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wifi: rtw89: pci: correct ISR RDU bit for 8922AE

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The interrupt status (ISR) bits of RX desc unavailable (RDU) for 8922AE
are B_BE_RDU_CH1_INT_V1 and B_BE_RDU_CH0_INT_V1. With wrong bits, if it
happens, driver can't recognize the situation and prompt a message.
Fix the definition accordingly.

Fixes: aa70f76120 ("wifi: rtw89: pci: generalize interrupt status bits of interrupt handlers")
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20250227131907.9864-1-pkshih@realtek.com
This commit is contained in:
Ping-Ke Shih 2025-02-27 21:19:07 +08:00
parent ad26d0dcb3
commit 3218f5bd8e
2 changed files with 30 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

56
drivers/net/wireless/realtek/rtw89/pci.h
View File

@ -455,34 +455,36 @@
#define B_BE_RX0DMA_INT_EN BIT(0)
#define R_BE_HAXI_HISR00 0xB0B4
#define B_BE_RDU_CH6_INT BIT(28)
#define B_BE_RDU_CH5_INT BIT(27)
#define B_BE_RDU_CH4_INT BIT(26)
#define B_BE_RDU_CH2_INT BIT(25)
#define B_BE_RDU_CH1_INT BIT(24)
#define B_BE_RDU_CH0_INT BIT(23)
#define B_BE_RXDMA_STUCK_INT BIT(22)
#define B_BE_TXDMA_STUCK_INT BIT(21)
#define B_BE_TXDMA_CH14_INT BIT(20)
#define B_BE_TXDMA_CH13_INT BIT(19)
#define B_BE_TXDMA_CH12_INT BIT(18)
#define B_BE_TXDMA_CH11_INT BIT(17)
#define B_BE_TXDMA_CH10_INT BIT(16)
#define B_BE_TXDMA_CH9_INT BIT(15)
#define B_BE_TXDMA_CH8_INT BIT(14)
#define B_BE_TXDMA_CH7_INT BIT(13)
#define B_BE_TXDMA_CH6_INT BIT(12)
#define B_BE_TXDMA_CH5_INT BIT(11)
#define B_BE_TXDMA_CH4_INT BIT(10)
#define B_BE_TXDMA_CH3_INT BIT(9)
#define B_BE_TXDMA_CH2_INT BIT(8)
#define B_BE_TXDMA_CH1_INT BIT(7)
#define B_BE_TXDMA_CH0_INT BIT(6)
#define B_BE_RPQ1DMA_INT BIT(5)
#define B_BE_RX1P1DMA_INT BIT(4)
#define B_BE_RDU_CH5_INT_V1 BIT(30)
#define B_BE_RDU_CH4_INT_V1 BIT(29)
#define B_BE_RDU_CH3_INT_V1 BIT(28)
#define B_BE_RDU_CH2_INT_V1 BIT(27)
#define B_BE_RDU_CH1_INT_V1 BIT(26)
#define B_BE_RDU_CH0_INT_V1 BIT(25)
#define B_BE_RXDMA_STUCK_INT_V1 BIT(24)
#define B_BE_TXDMA_STUCK_INT_V1 BIT(23)
#define B_BE_TXDMA_CH14_INT_V1 BIT(22)
#define B_BE_TXDMA_CH13_INT_V1 BIT(21)
#define B_BE_TXDMA_CH12_INT_V1 BIT(20)
#define B_BE_TXDMA_CH11_INT_V1 BIT(19)
#define B_BE_TXDMA_CH10_INT_V1 BIT(18)
#define B_BE_TXDMA_CH9_INT_V1 BIT(17)
#define B_BE_TXDMA_CH8_INT_V1 BIT(16)
#define B_BE_TXDMA_CH7_INT_V1 BIT(15)
#define B_BE_TXDMA_CH6_INT_V1 BIT(14)
#define B_BE_TXDMA_CH5_INT_V1 BIT(13)
#define B_BE_TXDMA_CH4_INT_V1 BIT(12)
#define B_BE_TXDMA_CH3_INT_V1 BIT(11)
#define B_BE_TXDMA_CH2_INT_V1 BIT(10)
#define B_BE_TXDMA_CH1_INT_V1 BIT(9)
#define B_BE_TXDMA_CH0_INT_V1 BIT(8)
#define B_BE_RX1P1DMA_INT_V1 BIT(7)
#define B_BE_RX0P1DMA_INT_V1 BIT(6)
#define B_BE_RO1DMA_INT BIT(5)
#define B_BE_RP1DMA_INT BIT(4)
#define B_BE_RX1DMA_INT BIT(3)
#define B_BE_RPQ0DMA_INT BIT(2)
#define B_BE_RX0P1DMA_INT BIT(1)
#define B_BE_RO0DMA_INT BIT(2)
#define B_BE_RP0DMA_INT BIT(1)
#define B_BE_RX0DMA_INT BIT(0)
/* TX/RX */

2
drivers/net/wireless/realtek/rtw89/pci_be.c
View File

@ -666,7 +666,7 @@ SIMPLE_DEV_PM_OPS(rtw89_pm_ops_be, rtw89_pci_suspend_be, rtw89_pci_resume_be);
EXPORT_SYMBOL(rtw89_pm_ops_be);
const struct rtw89_pci_gen_def rtw89_pci_gen_be = {
.isr_rdu = B_BE_RDU_CH1_INT | B_BE_RDU_CH0_INT,
.isr_rdu = B_BE_RDU_CH1_INT_V1 | B_BE_RDU_CH0_INT_V1,
.isr_halt_c2h = B_BE_HALT_C2H_INT,
.isr_wdt_timeout = B_BE_WDT_TIMEOUT_INT,
.isr_clear_rpq = {R_BE_PCIE_DMA_ISR, B_BE_PCIE_RX_RPQ0_ISR_V1},