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RDMA/bnxt_re: Cache MSIx info to a local structure
L2 driver allocates the vectors for RoCE and pass it through the en_dev structure to RoCE. During probe, cache the MSIx related info to a local structure. Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com> Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> Link: https://patch.msgid.link/1731577748-1804-5-git-send-email-selvin.xavier@broadcom.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
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@ -157,6 +157,7 @@ struct bnxt_re_pacing {
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#define BNXT_RE_MIN_MSIX 2
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#define BNXT_RE_MAX_MSIX BNXT_MAX_ROCE_MSIX
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struct bnxt_re_nq_record {
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struct bnxt_msix_entry msix_entries[BNXT_RE_MAX_MSIX];
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struct bnxt_qplib_nq nq[BNXT_RE_MAX_MSIX];
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int num_msix;
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/* serialize NQ access */
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@ -347,7 +347,7 @@ static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent)
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return;
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rdev = en_info->rdev;
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msix_ent = rdev->en_dev->msix_entries;
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msix_ent = rdev->nqr->msix_entries;
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rcfw = &rdev->rcfw;
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if (!ent) {
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/* Not setting the f/w timeout bit in rcfw.
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@ -363,7 +363,7 @@ static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent)
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* in device sctructure.
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*/
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for (indx = 0; indx < rdev->nqr->num_msix; indx++)
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rdev->en_dev->msix_entries[indx].vector = ent[indx].vector;
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rdev->nqr->msix_entries[indx].vector = ent[indx].vector;
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rc = bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector,
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false);
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@ -1569,9 +1569,9 @@ static int bnxt_re_init_res(struct bnxt_re_dev *rdev)
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mutex_init(&rdev->nqr->load_lock);
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for (i = 1; i < rdev->nqr->num_msix ; i++) {
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db_offt = rdev->en_dev->msix_entries[i].db_offset;
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db_offt = rdev->nqr->msix_entries[i].db_offset;
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rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nqr->nq[i - 1],
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i - 1, rdev->en_dev->msix_entries[i].vector,
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i - 1, rdev->nqr->msix_entries[i].vector,
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db_offt, &bnxt_re_cqn_handler,
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&bnxt_re_srqn_handler);
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if (rc) {
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@ -1658,7 +1658,7 @@ static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
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rattr.type = type;
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rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX;
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rattr.depth = BNXT_QPLIB_NQE_MAX_CNT - 1;
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rattr.lrid = rdev->en_dev->msix_entries[i + 1].ring_idx;
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rattr.lrid = rdev->nqr->msix_entries[i + 1].ring_idx;
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rc = bnxt_re_net_ring_alloc(rdev, &rattr, &nq->ring_id);
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if (rc) {
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ibdev_err(&rdev->ibdev,
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@ -1983,6 +1983,8 @@ static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 op_type)
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return rc;
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}
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rdev->nqr->num_msix = rdev->en_dev->ulp_tbl->msix_requested;
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memcpy(rdev->nqr->msix_entries, rdev->en_dev->msix_entries,
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sizeof(struct bnxt_msix_entry) * rdev->nqr->num_msix);
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/* Check whether VF or PF */
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bnxt_re_get_sriov_func_type(rdev);
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@ -2008,14 +2010,14 @@ static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 op_type)
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rattr.type = type;
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rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX;
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rattr.depth = BNXT_QPLIB_CREQE_MAX_CNT - 1;
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rattr.lrid = rdev->en_dev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx;
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rattr.lrid = rdev->nqr->msix_entries[BNXT_RE_AEQ_IDX].ring_idx;
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rc = bnxt_re_net_ring_alloc(rdev, &rattr, &creq->ring_id);
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if (rc) {
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ibdev_err(&rdev->ibdev, "Failed to allocate CREQ: %#x\n", rc);
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goto free_rcfw;
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}
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db_offt = rdev->en_dev->msix_entries[BNXT_RE_AEQ_IDX].db_offset;
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vid = rdev->en_dev->msix_entries[BNXT_RE_AEQ_IDX].vector;
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db_offt = rdev->nqr->msix_entries[BNXT_RE_AEQ_IDX].db_offset;
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vid = rdev->nqr->msix_entries[BNXT_RE_AEQ_IDX].vector;
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rc = bnxt_qplib_enable_rcfw_channel(&rdev->rcfw,
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vid, db_offt,
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&bnxt_re_aeq_handler);
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