From 3193e78fe541bf3af73d5ef6a4119b388fdd5c16 Mon Sep 17 00:00:00 2001
From: Jon Lin <jon.lin@rock-chips.com>
Date: Mon, 27 Mar 2023 19:10:37 +0800
Subject: [PATCH] arm64: dts: rockchip: Reserved bar2 memory region for pcie3x4
 ep

Change-Id: I5fac8637263c9f9fc351ddc6ae1d7cc37a8a32af
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3588-pcie-ep-demo.dtsi | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-pcie-ep-demo.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-pcie-ep-demo.dtsi
index dda90610e10a..65ff203aab31 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-pcie-ep-demo.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-pcie-ep-demo.dtsi
@@ -81,8 +81,11 @@ reserved-memory {
 		#address-cells = <2>;
 		#size-cells = <2>;
 		ranges;
-		dma_trans: dma-trans@3c000000 {
-			reg = <0x0 0x3c000000 0x0 0x04000000>;
+		bar0_region: bar0-region@3c000000 {
+			reg = <0x0 0x3c000000 0x0 0x00400000>;
+		};
+		bar2_region: bar2-region@40000000 {
+			reg = <0x0 0x40000000 0x0 0x04000000>;
 		};
 	};
 
@@ -428,7 +431,8 @@ &pcie30phy {
 
 &pcie3x4 {
 	compatible = "rockchip,rk3588-pcie-std-ep";
-	memory-region = <&dma_trans>;
+	memory-region = <&bar0_region>, <&bar2_region>;
+	memory-region-names = "bar0", "bar2";
 	status = "okay";
 };