dt-bindings: interrupt-controller: Convert arm,versatile-fpga-irq to DT schema

Convert the Arm Versatile FPGA interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250505144558.1286889-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
This commit is contained in:
Rob Herring (Arm) 2025-05-05 09:45:56 -05:00
parent bac0fb596e
commit 3151c26c81
3 changed files with 62 additions and 39 deletions

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@ -1,38 +0,0 @@
* ARM Versatile FPGA interrupt controller
One or more FPGA IRQ controllers can be synthesized in an ARM reference board
such as the Integrator or Versatile family. The output of these different
controllers are OR:ed together and fed to the CPU tile's IRQ input. Each
instance can handle up to 32 interrupts.
Required properties:
- compatible: "arm,versatile-fpga-irq"
- interrupt-controller: Identifies the node as an interrupt controller
- #interrupt-cells: The number of cells to define the interrupts. Must be 1
as the FPGA IRQ controller has no configuration options for interrupt
sources. The cell is a u32 and defines the interrupt number.
- reg: The register bank for the FPGA interrupt controller.
- clear-mask: a u32 number representing the mask written to clear all IRQs
on the controller at boot for example.
- valid-mask: a u32 number representing a bit mask determining which of
the interrupts are valid. Unconnected/unused lines are set to 0, and
the system till not make it possible for devices to request these
interrupts.
The "oxsemi,ox810se-rps-irq" compatible is deprecated.
Example:
pic: pic@14000000 {
compatible = "arm,versatile-fpga-irq";
#interrupt-cells = <1>;
interrupt-controller;
reg = <0x14000000 0x100>;
clear-mask = <0xffffffff>;
valid-mask = <0x003fffff>;
};
Optional properties:
- interrupts: if the FPGA IRQ controller is cascaded, i.e. if its IRQ
output is simply connected to the input of another IRQ controller,
then the parent IRQ shall be specified in this property.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/arm,versatile-fpga-irq.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Versatile FPGA IRQ Controller
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
description:
One or more FPGA IRQ controllers can be synthesized in an ARM reference board
such as the Integrator or Versatile family. The output of these different
controllers are OR:ed together and fed to the CPU tile's IRQ input. Each
instance can handle up to 32 interrupts.
properties:
compatible:
const: arm,versatile-fpga-irq
interrupt-controller: true
'#interrupt-cells':
const: 1
reg:
maxItems: 1
clear-mask:
description: A mask written to clear all IRQs on the controller at boot.
$ref: /schemas/types.yaml#/definitions/uint32
valid-mask:
description:
A bit mask determining which interrupts are valid; unused lines are set to 0.
$ref: /schemas/types.yaml#/definitions/uint32
interrupts:
maxItems: 1
additionalProperties: false
required:
- compatible
- interrupt-controller
- '#interrupt-cells'
- reg
- clear-mask
- valid-mask
examples:
- |
interrupt-controller@14000000 {
compatible = "arm,versatile-fpga-irq";
#interrupt-cells = <1>;
interrupt-controller;
reg = <0x14000000 0x100>;
clear-mask = <0xffffffff>;
valid-mask = <0x003fffff>;
};

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@ -1918,7 +1918,7 @@ F: Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml
F: Documentation/devicetree/bindings/auxdisplay/arm,versatile-lcd.yaml
F: Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml
F: Documentation/devicetree/bindings/i2c/arm,i2c-versatile.yaml
F: Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt
F: Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml
F: Documentation/devicetree/bindings/mtd/mtd-physmap.yaml
F: arch/arm/boot/dts/arm/arm-realview-*
F: arch/arm/boot/dts/arm/integrator*