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clk: rockchip: Fixed xpcs_mii clock for rk3568

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Change-Id: I3dfa606f4d790a8b8882bafb268a236a4c245529
Signed-off-by: David Wu <david.wu@rock-chips.com>
This commit is contained in:
David Wu 2020-12-31 18:04:35 +08:00 committed by Tao Huang
parent 14c6e632ad
commit 30ebb681b7
1 changed files with 2 additions and 2 deletions
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4
drivers/clk/rockchip/clk-rk3568.c
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@ -325,11 +325,11 @@ PNAME(clk_pciephy2_ref_p) = { "clk_pciephy2_osc0", "clk_pciephy2_div" };
PNAME(mux_gmac0_p) = { "clk_mac0_2top", "gmac0_clkin" };
PNAME(mux_gmac0_rgmii_speed_p) = { "clk_gmac0", "clk_gmac0", "clk_gmac0_tx_div50", "clk_gmac0_tx_div5" };
PNAME(mux_gmac0_rmii_speed_p) = { "clk_gmac0_rx_div20", "clk_gmac0_rx_div2" };
PNAME(mux_gmac0_rx_tx_p) = { "clk_gmac0_rgmii_speed", "clk_gmac0_rmii_speed", "clk_xpcs_mii" };
PNAME(mux_gmac0_rx_tx_p) = { "clk_gmac0_rgmii_speed", "clk_gmac0_rmii_speed", "clk_gmac0_xpcs_mii" };
PNAME(mux_gmac1_p) = { "clk_mac1_2top", "gmac1_clkin" };
PNAME(mux_gmac1_rgmii_speed_p) = { "clk_gmac1", "clk_gmac1", "clk_gmac1_tx_div50", "clk_gmac1_tx_div5" };
PNAME(mux_gmac1_rmii_speed_p) = { "clk_gmac1_rx_div20", "clk_gmac1_rx_div2" };
PNAME(mux_gmac1_rx_tx_p) = { "clk_gmac1_rgmii_speed", "clk_gmac1_rmii_speed" };
PNAME(mux_gmac1_rx_tx_p) = { "clk_gmac1_rgmii_speed", "clk_gmac1_rmii_speed", "clk_gmac1_xpcs_mii" };
PNAME(clk_hdmi_ref_p) = { "hpll", "hpll_ph0" };
PNAME(clk_pdpmu_p) = { "ppll", "gpll" };
PNAME(clk_mac_2top_p) = { "cpll_125m", "cpll_50m", "cpll_25m", "ppll" };