From 30cbc746c31f85fd9fd96dec4e7f5a463435b063 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Wed, 18 Nov 2020 07:26:30 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3568-pinctrl: Adjust sdmmc0 drive strength Change-Id: I56fb5c77978355dadf883e32ad9b51c92345e52f Signed-off-by: Shawn Lin --- arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi index b509228bbb39..d2730d102627 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi @@ -1690,25 +1690,25 @@ sdmmc0 { sdmmc0_bus4: sdmmc0-bus4 { rockchip,pins = /* sdmmc0_d0 */ - <1 RK_PD5 1 &pcfg_pull_up_drv_level_5>, + <1 RK_PD5 1 &pcfg_pull_up_drv_level_2>, /* sdmmc0_d1 */ - <1 RK_PD6 1 &pcfg_pull_up_drv_level_5>, + <1 RK_PD6 1 &pcfg_pull_up_drv_level_2>, /* sdmmc0_d2 */ - <1 RK_PD7 1 &pcfg_pull_up_drv_level_5>, + <1 RK_PD7 1 &pcfg_pull_up_drv_level_2>, /* sdmmc0_d3 */ - <2 RK_PA0 1 &pcfg_pull_up_drv_level_5>; + <2 RK_PA0 1 &pcfg_pull_up_drv_level_2>; }; /omit-if-no-ref/ sdmmc0_clk: sdmmc0-clk { rockchip,pins = /* sdmmc0_clk */ - <2 RK_PA2 1 &pcfg_pull_up_drv_level_5>; + <2 RK_PA2 1 &pcfg_pull_up_drv_level_1>; }; /omit-if-no-ref/ sdmmc0_cmd: sdmmc0-cmd { rockchip,pins = /* sdmmc0_cmd */ - <2 RK_PA1 1 &pcfg_pull_up_drv_level_5>; + <2 RK_PA1 1 &pcfg_pull_up_drv_level_2>; }; /omit-if-no-ref/ sdmmc0_det: sdmmc0-det {