From 3086c0a73ef9b45b75e602c05bad74ee7339a489 Mon Sep 17 00:00:00 2001 From: Joy Zou Date: Tue, 19 May 2026 19:15:16 +0800 Subject: [PATCH] arm64: dts: imx91-9x9-qsb: add pinctrl for wdog3 reset The wdog3 node enables fsl,ext-reset-output to assert an external reset signal upon watchdog timeout, but lacks pinctrl configuration for the physical pad. Without proper pinctrl settings, which could cause the watchdog timeout to fail to reset the board hardware. Add pinctrl configuration to ensure the pin is properly muxed and configured for external watchdog reset functionality. Signed-off-by: Joy Zou Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx91-9x9-qsb.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx91-9x9-qsb.dts b/arch/arm64/boot/dts/freescale/imx91-9x9-qsb.dts index 9cbfe57be2d3..62549a6de1b6 100644 --- a/arch/arm64/boot/dts/freescale/imx91-9x9-qsb.dts +++ b/arch/arm64/boot/dts/freescale/imx91-9x9-qsb.dts @@ -230,6 +230,12 @@ MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e >; }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX91_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e + >; + }; }; &lpi2c1 { @@ -419,6 +425,8 @@ &usdhc2 { }; &wdog3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; fsl,ext-reset-output; status = "okay"; };