From dd3d4327240dbd5e4a256f7428f92f454e23edba Mon Sep 17 00:00:00 2001 From: Jian Hu Date: Tue, 21 Apr 2026 16:17:43 +0800 Subject: [PATCH 1/8] arm64: dts: meson: a1: Add clk measure support Add the clock measure device to the A1 SoC family. Reviewed-by: Neil Armstrong Signed-off-by: Jian Hu Link: https://patch.msgid.link/20260421-clkmsr_a1_t7-v3-3-efc00b0f9e6b@amlogic.com Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index 348411411f3d..6f6a6145cba1 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -576,6 +576,11 @@ saradc: adc@2c00 { status = "disabled"; }; + clock-measurer@3400 { + compatible = "amlogic,a1-clk-measure"; + reg = <0x0 0x3400 0x0 0x1c>; + }; + i2c1: i2c@5c00 { compatible = "amlogic,meson-axg-i2c"; status = "disabled"; From d0a92020bb87b45a235d9d1f9ce76494e9ed02ca Mon Sep 17 00:00:00 2001 From: Jian Hu Date: Tue, 21 Apr 2026 16:17:44 +0800 Subject: [PATCH 2/8] arm64: dts: amlogic: t7: Add clk measure support Add the clock measure device to the T7 SoC family. Signed-off-by: Jian Hu Reviewed-by: Neil Armstrong Link: https://patch.msgid.link/20260421-clkmsr_a1_t7-v3-4-efc00b0f9e6b@amlogic.com Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi index cc371fcd1896..c3dc479b137d 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi @@ -674,6 +674,11 @@ pwm_ao_gh: pwm@32000 { status = "disabled"; }; + clock-measurer@48000 { + compatible = "amlogic,t7-clk-measure"; + reg = <0x0 0x48000 0x0 0x1c>; + }; + pwm_ab: pwm@58000 { compatible = "amlogic,t7-pwm", "amlogic,meson-s4-pwm"; reg = <0x0 0x58000 0x0 0x24>; From 3ecd66ea250b81dcc847253efa6e4d691e6523c8 Mon Sep 17 00:00:00 2001 From: Xianwei Zhao Date: Mon, 29 Jun 2026 07:52:53 +0000 Subject: [PATCH 3/8] arm64: dts: amlogic: add some device nodes for A9 Add pinctrl and irqchip-gpio device nodes for A9 SoC. Signed-off-by: Xianwei Zhao Link: https://patch.msgid.link/20260629-a9-node-v2-1-dadd3401fccb@amlogic.com Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi | 140 ++++++++++++++++++++ 1 file changed, 140 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi index 660c8556a864..b0e0fadeed82 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include / { interrupt-parent = <&gic>; @@ -97,6 +98,95 @@ soc { #size-cells = <2>; ranges; + apb: bus@fe000000 { + compatible = "simple-bus"; + reg = <0x0 0xfe000000 0x0 0x480000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; + + periphs_pinctrl: pinctrl@4000 { + compatible = "amlogic,pinctrl-a9"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0x4000 0x0 0x340>; + + gpioz: gpio@c0 { + reg = <0 0xc0 0 0x20>, <0 0x18 0 0x8>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Z<<8) 16>; + }; + + gpiox: gpio@100 { + reg = <0 0x100 0 0x24>, <0 0xc 0 0x8>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 18>; + }; + + gpioh: gpio@140 { + reg = <0 0x140 0 0x20>, <0 0x2c 0 0x4>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_H<<8) 8>; + }; + + gpiom: gpio@1a0 { + reg = <0 0x1a0 0 0x20>, <0 0x20 0 0x4>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_M<<8) 8>; + }; + + gpiob: gpio@240 { + reg = <0 0x240 0 0x20>, <0 0x0 0 0x8>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>; + }; + + gpioa: gpio@280 { + reg = <0 0x280 0 0x24>, <0 0x40 0 0xc>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_A<<8) 20>; + }; + + gpioy: gpio@2c0 { + reg = <0 0x2c0 0 0x20>, <0 0x30 0 0x8>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Y<<8) 10>; + }; + + gpiocc: gpio@300 { + reg = <0 0x300 0 0x20>, <0 0x14 0 0x4>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>; + }; + }; + + gpio_intc: interrupt-controller@4080 { + compatible = "amlogic,a9-gpio-intc", + "amlogic,meson-gpio-intc"; + reg = <0x0 0x4080 0x0 0x20>; + interrupt-controller; + #interrupt-cells = <2>; + amlogic,channel-interrupts = + <10 11 12 13 14 15 16 17 18 19 20 21>; + }; + }; + gic: interrupt-controller@ff800000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; @@ -114,6 +204,56 @@ aobus: bus@ffa00000 { #size-cells = <2>; ranges = <0x0 0x0 0x0 0xffa00000 0x0 0x100000>; + aobus_pinctrl: pinctrl@4000 { + compatible = "amlogic,pinctrl-a9"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0x4000 0x0 0x0e0>; + + gpioao: gpio@1c { + reg = <0 0x1c 0 0x20>, <0 0x0 0 0x8>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&aobus_pinctrl 0 (AMLOGIC_GPIO_AO<<8) 13>; + }; + + gpioc: gpio@3c { + reg = <0 0x3c 0 0x20>, <0 0x10 0 0x4>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&aobus_pinctrl 0 (AMLOGIC_GPIO_C<<8) 7>; + }; + + gpiod: gpio@5c { + reg = <0 0x5c 0 0x24>, <0 0x8 0 0x8>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&aobus_pinctrl 0 (AMLOGIC_GPIO_D<<8) 18>; + }; + + test_n: gpio@c0 { + reg = <0 0xc0 0 0x20>; + reg-names = "gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&aobus_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>; + }; + }; + + gpio_ao_intc: interrupt-controller@4080 { + compatible = "amlogic,a9-gpio-ao-intc", + "amlogic,meson-gpio-intc"; + reg = <0x0 0x4080 0x0 0x34>; + interrupt-controller; + #interrupt-cells = <2>; + amlogic,channel-interrupts = + <384 385 386 387 388 389 390 391 392 393 + 394 395 396 397 398 399 400 401 402 403>; + }; + uart_b: serial@1e000 { compatible = "amlogic,a9-uart", "amlogic,meson-s4-uart"; From 6c4345eb714f094ea579e3234cafed9f8c0634f8 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 6 Jul 2026 11:35:09 +0200 Subject: [PATCH 4/8] arm64: dts: amlogic: Correct indentation and whitespace Correct spaces or mix of tabs+spaces into proper tab-indented lines and remove other whitespace violations. No functional impact (same DTB). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Martin Blumenstingl Link: https://patch.msgid.link/20260706093508.273968-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Neil Armstrong --- .../boot/dts/amlogic/meson-g12b-a311d.dtsi | 32 +++++++++---------- .../dts/amlogic/meson-gxl-s905d-sml5442tw.dts | 2 +- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 2 +- 3 files changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi index f15baa708b36..8254e51d5e27 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi @@ -88,25 +88,25 @@ opp-1800000000 { opp-microvolt = <831000>; }; - opp-1908000000 { - opp-hz = /bits/ 64 <1908000000>; - opp-microvolt = <861000>; - }; + opp-1908000000 { + opp-hz = /bits/ 64 <1908000000>; + opp-microvolt = <861000>; + }; - opp-2016000000 { - opp-hz = /bits/ 64 <2016000000>; - opp-microvolt = <911000>; - }; + opp-2016000000 { + opp-hz = /bits/ 64 <2016000000>; + opp-microvolt = <911000>; + }; - opp-2108000000 { - opp-hz = /bits/ 64 <2108000000>; - opp-microvolt = <951000>; - }; + opp-2108000000 { + opp-hz = /bits/ 64 <2108000000>; + opp-microvolt = <951000>; + }; - opp-2208000000 { - opp-hz = /bits/ 64 <2208000000>; - opp-microvolt = <1011000>; - }; + opp-2208000000 { + opp-hz = /bits/ 64 <2208000000>; + opp-microvolt = <1011000>; + }; }; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-sml5442tw.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-sml5442tw.dts index c490dbbf063b..5913e59ff294 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-sml5442tw.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-sml5442tw.dts @@ -64,7 +64,7 @@ &internal_phy { }; &ir { - linux,rc-map-name = "rc-khamsin"; + linux,rc-map-name = "rc-khamsin"; }; /* This is connected to the Bluetooth module: */ diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index e202d84f0672..d5e0f72892f8 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -642,7 +642,7 @@ mux { function = "eth_led"; }; }; - + pwm_a_pins: pwm_a { mux { groups = "pwm_a"; From 77c63ef3be3972eb3d8aac2dd36f349d78620b0d Mon Sep 17 00:00:00 2001 From: Jun Yan Date: Wed, 24 Jun 2026 21:56:41 +0800 Subject: [PATCH 5/8] arm64: dts: amlogic: meson-axg: Disable nfc node by default nand_rb0 and emmc_ds share one pad. Before enabling nand_rb0 for nfc, disable nfc nodes by default to resolve pinctrl resource contention. No mainline AXG boards enable nfc currently thus no extra DTS adjustments are needed. Signed-off-by: Jun Yan Reviewed-by: Martin Blumenstingl Link: https://patch.msgid.link/20260624135650.727077-2-jerrysteve1101@gmail.com Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index f1f53fd98ae2..6457667d974e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -1999,6 +1999,7 @@ nfc: nand-controller@7800 { clocks = <&clkc CLKID_SD_EMMC_C>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "device"; + status = "disabled"; }; usb2_phy1: phy@9020 { From 45eb76f9ab6854f79690d56d04df227429a536b8 Mon Sep 17 00:00:00 2001 From: Jun Yan Date: Wed, 24 Jun 2026 21:56:42 +0800 Subject: [PATCH 6/8] arm64: dts: amlogic: meson-axg: Add missing nand_rb0 pin to nand_all_pins The nand_all_pins pinctrl node was missing the nand_rb0 (ready/busy) pin description, which is required for NAND controller operation. Add it to the pinmux list. Fixes: be18d53c32b2 ("arm64: dts: amlogic: meson-axg: pinctrl node for NAND") Signed-off-by: Jun Yan Reviewed-by: Martin Blumenstingl Link: https://patch.msgid.link/20260624135650.727077-3-jerrysteve1101@gmail.com Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 6457667d974e..8ca3ac09b306 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -481,7 +481,8 @@ mux { "nand_ale", "nand_cle", "nand_wen_clk", - "nand_ren_wr"; + "nand_ren_wr", + "nand_rb0"; function = "nand"; input-enable; bias-pull-up; From 25ab968f7d27f46927658150bf466cac856e4f4f Mon Sep 17 00:00:00 2001 From: Jun Yan Date: Wed, 24 Jun 2026 21:56:43 +0800 Subject: [PATCH 7/8] arm64: dts: amlogic: meson-axg: Disable pcie_phy node by default Set the pcie_phy node to "disabled" as it is not used on some boards and should be enabled per-board when necessary. This change suppresses the deferred probe warning: platform ff644000.phy: deferred probe pending: (reason unknown) The meson-axg dtsi now disables pcie_phy by default, so enable it for the s400 board to support PCIe functionality. Signed-off-by: Jun Yan Reviewed-by: Martin Blumenstingl Link: https://patch.msgid.link/20260624135650.727077-4-jerrysteve1101@gmail.com Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 4 ++++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 1 + 2 files changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts index 285c6ac1dd61..7ba249cc3d56 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts @@ -448,6 +448,10 @@ &pcieB { status = "okay"; }; +&pcie_phy { + status = "okay"; +}; + &pwm_ab { status = "okay"; pinctrl-0 = <&pwm_a_x20_pins>; diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 8ca3ac09b306..5b8ef98f6d03 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -328,6 +328,7 @@ pcie_phy: phy@ff644000 { phys = <&mipi_pcie_analog_dphy>; phy-names = "analog"; #phy-cells = <0>; + status = "disabled"; }; pdm: audio-controller@ff632000 { From 7f1d0cc86cb70fa550163b6f70fd1d484c03218e Mon Sep 17 00:00:00 2001 From: Jun Yan Date: Wed, 24 Jun 2026 21:56:44 +0800 Subject: [PATCH 8/8] arm64: dts: amlogic: meson-axg-s400: enable mipi_pcie_analog_dphy for PCIe The PCIe PHY node references mipi_pcie_analog_dphy via its phys property. Enable this analog PHY node to make PCIe functionally viable. Fixes: 9715b01da6cf ("arm64: dts: meson-axg-s400: enable PCIe M.2 Key E slots") Signed-off-by: Jun Yan Reviewed-by: Martin Blumenstingl Link: https://patch.msgid.link/20260624135650.727077-5-jerrysteve1101@gmail.com Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts index 7ba249cc3d56..4f13e2b041e1 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts @@ -431,6 +431,10 @@ gpio_speaker: gpio-controller@1f { }; }; +&mipi_pcie_analog_dphy { + status = "okay"; +}; + &pdm { pinctrl-0 = <&pdm_dclk_a14_pins>, <&pdm_din0_pins>, <&pdm_din1_pins>, <&pdm_din2_pins>, <&pdm_din3_pins>;