From 3069e8f3e1e9bdf007316eadae4d1777065e7b78 Mon Sep 17 00:00:00 2001 From: Andrew Jones Date: Fri, 21 Aug 2026 13:21:00 +0200 Subject: [PATCH] iommu/riscv: Report cache coherency capability VFIO and iommufd require IOMMU_CAP_CACHE_COHERENCY because they use IOMMU_CACHE mappings and have no userspace cache-maintenance path. RISC-V page tables preserve physical memory attributes for IOMMU_CACHE mappings. Svpbmt marks mappings without IOMMU_CACHE as non-cacheable, but preserving physical attributes cannot make a noncoherent device path coherent. Report the capability only for devices marked DMA coherent. This limits userspace assignment to paths that can honor cacheable mappings. Signed-off-by: Andrew Jones Reviewed-by: Jason Gunthorpe Signed-off-by: Joerg Roedel --- drivers/iommu/riscv/iommu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c index fe8e6d0f8a23..fbdca69c436e 100644 --- a/drivers/iommu/riscv/iommu.c +++ b/drivers/iommu/riscv/iommu.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -1444,6 +1445,16 @@ static struct iommu_group *riscv_iommu_device_group(struct device *dev) return generic_device_group(dev); } +static bool riscv_iommu_capable(struct device *dev, enum iommu_cap cap) +{ + switch (cap) { + case IOMMU_CAP_CACHE_COHERENCY: + return dev_is_dma_coherent(dev); + default: + return false; + } +} + static int riscv_iommu_of_xlate(struct device *dev, const struct of_phandle_args *args) { return iommu_fwspec_add_ids(dev, args->args, 1); @@ -1505,6 +1516,7 @@ static void riscv_iommu_release_device(struct device *dev) static const struct iommu_ops riscv_iommu_ops = { .of_xlate = riscv_iommu_of_xlate, + .capable = riscv_iommu_capable, .identity_domain = &riscv_iommu_identity_domain, .blocked_domain = &riscv_iommu_blocking_domain, .release_domain = &riscv_iommu_blocking_domain,