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wifi: rtw89: refine RX filter configuration for WiFi 7 generation

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When an AP interface is registered and starts AP, mac80211 calls the
configure_filter() to clear B_AX_A_UC_CAM_MATCH and B_AX_A_BC_CAM_MATCH
so that frames from un-associated stations can be received. However, for
a dedicated AP interface created via iw command, configure_filter() is
only triggered on the initial AP startup. Since the interface remains up
even after hostapd stops, and it isn't triggered again on later restarts.
Additionally, each AP start causes IPS leave, reverting the RX filter to
its default value.

For WiFi 7 chips, the default value is hardcoded in rx_fltr_init_be(),
so the reverted value does not match hal.rx_fltr. Therefore, refine
the behavior of WiFi 7 chips to align with the WiFi 6 implementation.

Signed-off-by: Dian-Syuan Yang <dian_syuan0116@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260729124354.3231368-2-pkshih@realtek.com
This commit is contained in:
Dian-Syuan Yang 2026-07-29 20:43:52 +08:00 committed by Ping-Ke Shih
parent 667c12782a
commit 304720870f
5 changed files with 11 additions and 7 deletions
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3
drivers/net/wireless/realtek/rtw89/core.c
View File

@ -6960,6 +6960,7 @@ void rtw89_sta_unset_link(struct rtw89_sta *rtwsta, unsigned int link_id)
int rtw89_core_init(struct rtw89_dev *rtwdev)
{
const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
struct rtw89_btc *btc = &rtwdev->btc;
u8 band;
@ -7016,7 +7017,7 @@ int rtw89_core_init(struct rtw89_dev *rtwdev)
rtw89_core_ppdu_sts_init(rtwdev);
rtw89_traffic_stats_init(rtwdev, &rtwdev->stats);
rtwdev->hal.rx_fltr = DEFAULT_AX_RX_FLTR;
rtwdev->hal.rx_fltr = mac->default_rx_fltr;
rtwdev->dbcc_en = false;
rtwdev->mlo_dbcc_mode = MLO_DBCC_NOT_SUPPORT;
rtwdev->mac.qta_mode = RTW89_QTA_SCC;

1
drivers/net/wireless/realtek/rtw89/mac.c
View File

@ -7454,6 +7454,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_ax = {
.mem_base_addrs = rtw89_mac_mem_base_addrs_ax,
.mem_page_size = MAC_MEM_DUMP_PAGE_SIZE_AX,
.rx_fltr = R_AX_RX_FLTR_OPT,
.default_rx_fltr = DEFAULT_AX_RX_FLTR,
.port_base = &rtw89_port_base_ax,
.agg_len_ht = R_AX_AGG_LEN_HT_0,
.ps_status = R_AX_PPWRBIT_SETTING,

1
drivers/net/wireless/realtek/rtw89/mac.h
View File

@ -1063,6 +1063,7 @@ struct rtw89_mac_gen_def {
const u32 *mem_base_addrs;
u32 mem_page_size;
u32 rx_fltr;
u32 default_rx_fltr;
const struct rtw89_port_reg *port_base;
u32 agg_len_ht;
u32 ps_status;

7
drivers/net/wireless/realtek/rtw89/mac_be.c
View File

@ -1328,11 +1328,7 @@ static int rx_fltr_init_be(struct rtw89_dev *rtwdev, u8 mac_idx)
rtw89_mac_typ_fltr_opt_be(rtwdev, RTW89_DATA, RTW89_FWD_TO_HOST, mac_idx);
reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_RX_FLTR_OPT, mac_idx);
val = B_BE_A_BC_CAM_MATCH | B_BE_A_UC_CAM_MATCH | B_BE_A_MC |
B_BE_A_BC | B_BE_A_A1_MATCH |
u32_encode_bits(15, B_BE_UID_FILTER_MASK);
rtw89_write32(rtwdev, reg, val);
u32p_replace_bits(&rtwdev->hal.rx_fltr, 15, B_BE_UID_FILTER_MASK);
rtw89_write32(rtwdev, reg, rtwdev->hal.rx_fltr);
reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_PLCP_HDR_FLTR, mac_idx);
val = B_BE_HE_SIGB_CRC_CHK | B_BE_VHT_MU_SIGB_CRC_CHK |
@ -3276,6 +3272,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
.mem_base_addrs = rtw89_mac_mem_base_addrs_be,
.mem_page_size = MAC_MEM_DUMP_PAGE_SIZE_BE,
.rx_fltr = R_BE_RX_FLTR_OPT,
.default_rx_fltr = DEFAULT_BE_RX_FLTR,
.port_base = &rtw89_port_base_be,
.agg_len_ht = R_BE_AGG_LEN_HT_0,
.ps_status = R_BE_WMTX_POWER_BE_BIT_CTL,

6
drivers/net/wireless/realtek/rtw89/reg.h
View File

@ -3348,7 +3348,7 @@
#define DEFAULT_AX_RX_FLTR (B_AX_A_A1_MATCH | B_AX_A_BC | B_AX_A_MC | \
B_AX_A_UC_CAM_MATCH | B_AX_A_BC_CAM_MATCH | \
B_AX_A_PWR_MGNT | B_AX_A_FTM_REQ | \
u32_encode_bits(3, B_AX_UID_FILTER_MASK) | \
FIELD_PREP_CONST(B_AX_UID_FILTER_MASK, 3) | \
B_AX_A_BCN_CHK_EN)
#define B_AX_RX_FLTR_CFG_MASK ((u32)~B_AX_RX_MPDU_MAX_LEN_MASK)
@ -8209,6 +8209,10 @@
#define B_BE_A_BC BIT(2)
#define B_BE_A_A1_MATCH BIT(1)
#define B_BE_SNIFFER_MODE BIT(0)
#define DEFAULT_BE_RX_FLTR (B_BE_A_BC_CAM_MATCH | B_BE_A_UC_CAM_MATCH | \
B_BE_A_MC | B_BE_A_BC | B_BE_A_A1_MATCH | \
FIELD_PREP_CONST(B_BE_UID_FILTER_MASK, 15) | \
B_BE_A_FTM_REQ | B_BE_A_BCN_CHK_EN)
#define R_BE_CTRL_FLTR 0x11424
#define R_BE_CTRL_FLTR_C1 0x15424