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update i2s fix music play and record bug
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parent
3ef4cc6362
commit
3040e33933
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@ -126,58 +126,83 @@ static struct rockchip_pcm_dma_params rockchip_i2s_pcm_stereo_in[MAX_I2S] = {
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static void rockchip_snd_txctrl(struct rk29_i2s_info *i2s, int on)
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{
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u32 opr,xfer,fifosts;
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int xor=0;
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I2S_DBG("Enter %s, %d >>>>>>>>>>>\n", __func__, __LINE__);
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opr = readl(&(pheadi2s->I2S_DMACR));
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xfer = readl(&(pheadi2s->I2S_XFER));
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if(xfer & I2S_RX_TRAN_START) {
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xor = 1;
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}
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opr &= ~I2S_TRAN_DMA_ENABLE;
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xfer &= ~I2S_TX_TRAN_START;
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xfer &= ~I2S_TX_TRAN_START;
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if (on)
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{
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if(xor) {
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xfer &= ~I2S_RX_TRAN_START;
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}
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writel(0, &(pheadi2s->I2S_XFER));
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writel(opr, &(pheadi2s->I2S_DMACR));
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writel(xfer, &(pheadi2s->I2S_XFER));
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udelay(5);
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opr |= I2S_TRAN_DMA_ENABLE;
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xfer |= I2S_TX_TRAN_START;
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writel(opr, &(pheadi2s->I2S_DMACR));
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if(xor) {
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xfer |= I2S_RX_TRAN_START;
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}
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writel(opr, &(pheadi2s->I2S_DMACR));
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writel(xfer, &(pheadi2s->I2S_XFER));
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}
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else
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{
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writel(opr, &(pheadi2s->I2S_DMACR));
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writel(xfer, &(pheadi2s->I2S_XFER));
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udelay(5);
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writel(opr, &(pheadi2s->I2S_DMACR));
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}
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I2S_DBG("Enter %s, %d, opr=0x%08X, xfer=0x%08X\n", __func__, __LINE__, opr, xfer);
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}
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static void rockchip_snd_rxctrl(struct rk29_i2s_info *i2s, int on)
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{
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u32 opr,xfer,fifosts;
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I2S_DBG("Enter %s, %d >>>>>>>>>>>\n", __func__, __LINE__);
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int xor=0;
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opr = readl(&(pheadi2s->I2S_DMACR));
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xfer = readl(&(pheadi2s->I2S_XFER));
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if(xfer & I2S_TX_TRAN_START){
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xor = 1;
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}
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opr &= ~I2S_RECE_DMA_ENABLE;
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xfer &= ~I2S_RX_TRAN_START;
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if (on)
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{
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writel(opr, &(pheadi2s->I2S_DMACR));
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writel(xfer, &(pheadi2s->I2S_XFER));
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udelay(5);
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{
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if(xor) {
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xfer &= ~I2S_TX_TRAN_START;
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}
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writel(0, &(pheadi2s->I2S_XFER));
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writel(opr, &(pheadi2s->I2S_DMACR));
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opr |= I2S_RECE_DMA_ENABLE;
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xfer |= I2S_RX_TRAN_START;
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if(xor) {
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xfer |= I2S_TX_TRAN_START;
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}
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writel(opr, &(pheadi2s->I2S_DMACR));
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writel(xfer, &(pheadi2s->I2S_XFER));
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}
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else
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{
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writel(opr, &(pheadi2s->I2S_DMACR));
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writel(xfer, &(pheadi2s->I2S_XFER));
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udelay(5);
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writel(opr, &(pheadi2s->I2S_DMACR));
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}
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I2S_DBG("Enter %s, %d, opr=0x%08X, xfer=0x%08X\n", __func__, __LINE__, opr, xfer);
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}
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/*
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@ -238,6 +263,7 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_soc_dai_link *dai = rtd->dai;
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struct rk29_i2s_info *i2s = to_info(dai->cpu_dai);
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u32 iismod;
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u32 dmarc;
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I2S_DBG("Enter %s, %d >>>>>>>>>>>\n", __func__, __LINE__);
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/*by Vincent Hsiung for EQ Vol Change*/
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@ -274,18 +300,24 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
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break;
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}
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#if defined (CONFIG_SND_RK29_CODEC_SOC_SLAVE)
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iismod |= I2S_MASTER_MODE;
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iismod &= ~I2S_SLAVE_MODE;
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#endif
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#if defined (CONFIG_SND_RK29_CODEC_SOC_MASTER)
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iismod |= I2S_SLAVE_MODE;
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#endif
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writel((16<<24) |(16<<18)|(16<<12)|(16<<6)|16, &(pheadi2s->I2S_FIFOLR));
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writel((16<<16) | 16, &(pheadi2s->I2S_DMACR));
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//writel((16<<24) |(16<<18)|(16<<12)|(16<<6)|16, &(pheadi2s->I2S_FIFOLR));
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dmarc = readl(&(pheadi2s->I2S_DMACR));
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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dmarc = ((dmarc & 0xFFFFFE00) | 16);
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else
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dmarc = ((dmarc & 0xFE00FFFF) | 16<<16);
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I2S_DBG("Enter %s, %d I2S_TXCR=0x%08X\n", __func__, __LINE__, iismod);
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writel(iismod, &(pheadi2s->I2S_TXCR));
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writel(dmarc, &(pheadi2s->I2S_DMACR));
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I2S_DBG("Enter %s, %d I2S_TXCR=0x%08X\n", __func__, __LINE__, iismod);
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writel(iismod, &(pheadi2s->I2S_TXCR));
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iismod = iismod & 0x00007FFF;
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writel(iismod, &(pheadi2s->I2S_RXCR));
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return 0;
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@ -654,3 +686,50 @@ MODULE_AUTHOR("rockchip");
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MODULE_DESCRIPTION("ROCKCHIP IIS ASoC Interface");
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MODULE_LICENSE("GPL");
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#ifdef CONFIG_PROC_FS
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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static int proc_i2s_show(struct seq_file *s, void *v)
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{
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unsigned int i;
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unsigned int reg;
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struct rk29_i2s_info *i2s=&rk29_i2s[0];
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printk("========Show I2S reg========\n");
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printk("I2S_TXCR = 0x%08X\n", readl(&(pheadi2s->I2S_TXCR)));
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printk("I2S_RXCR = 0x%08X\n", readl(&(pheadi2s->I2S_RXCR)));
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printk("I2S_TXCKR = 0x%08X\n", readl(&(pheadi2s->I2S_TXCKR)));
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printk("I2S_RXCKR = 0x%08X\n", readl(&(pheadi2s->I2S_RXCKR)));
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printk("I2S_DMACR = 0x%08X\n", readl(&(pheadi2s->I2S_DMACR)));
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printk("I2S_INTCR = 0x%08X\n", readl(&(pheadi2s->I2S_INTCR)));
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printk("I2S_INTSR = 0x%08X\n", readl(&(pheadi2s->I2S_INTSR)));
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printk("I2S_XFER = 0x%08X\n", readl(&(pheadi2s->I2S_XFER)));
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printk("========Show I2S reg========\n");
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return 0;
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}
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static int proc_i2s_open(struct inode *inode, struct file *file)
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{
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return single_open(file, proc_i2s_show, NULL);
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}
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static const struct file_operations proc_i2s_fops = {
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.open = proc_i2s_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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static int __init i2s_proc_init(void)
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{
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proc_create("i2s_reg", 0, NULL, &proc_i2s_fops);
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return 0;
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}
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late_initcall(i2s_proc_init);
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#endif /* CONFIG_PROC_FS */
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