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dt-bindings: net: tja11xx: fix the broken binding

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As Rob pointed in another mail thread [1], the binding of tja11xx PHY
is completely broken, the schema cannot catch the error in the DTS. A
compatiable string must be needed if we want to add a custom propety.
So extract known PHY IDs from the tja11xx PHY drivers and convert them
into supported compatible string list to fix the broken binding issue.

Fixes: 52b2fe4535 ("dt-bindings: net: tja11xx: add nxp,refclk_in property")
Link: https://lore.kernel.org/31058f49-bac5-49a9-a422-c43b121bf049@kernel.org  # [1]
Signed-off-by: Wei Fang <wei.fang@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20240909012152.431647-1-wei.fang@nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Wei Fang 2024-09-09 09:21:52 +08:00 committed by Jakub Kicinski
parent e8a63d473b
commit 2f9caba9b2
1 changed files with 46 additions and 16 deletions
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62
Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
View File

@ -14,8 +14,53 @@ maintainers:
description:
Bindings for NXP TJA11xx automotive PHYs
properties:
compatible:
enum:
- ethernet-phy-id0180.dc40
- ethernet-phy-id0180.dc41
- ethernet-phy-id0180.dc48
- ethernet-phy-id0180.dd00
- ethernet-phy-id0180.dd01
- ethernet-phy-id0180.dd02
- ethernet-phy-id0180.dc80
- ethernet-phy-id0180.dc82
- ethernet-phy-id001b.b010
- ethernet-phy-id001b.b013
- ethernet-phy-id001b.b030
- ethernet-phy-id001b.b031
allOf:
- $ref: ethernet-phy.yaml#
- if:
properties:
compatible:
contains:
enum:
- ethernet-phy-id0180.dc40
- ethernet-phy-id0180.dc41
- ethernet-phy-id0180.dc48
- ethernet-phy-id0180.dd00
- ethernet-phy-id0180.dd01
- ethernet-phy-id0180.dd02
then:
properties:
nxp,rmii-refclk-in:
type: boolean
description: |
The REF_CLK is provided for both transmitted and received data
in RMII mode. This clock signal is provided by the PHY and is
typically derived from an external 25MHz crystal. Alternatively,
a 50MHz clock signal generated by an external oscillator can be
connected to pin REF_CLK. A third option is to connect a 25MHz
clock to pin CLK_IN_OUT. So, the REF_CLK should be configured
as input or output according to the actual circuit connection.
If present, indicates that the REF_CLK will be configured as
interface reference clock input when RMII mode enabled.
If not present, the REF_CLK will be configured as interface
reference clock output when RMII mode enabled.
Only supported on TJA1100 and TJA1101.
patternProperties:
"^ethernet-phy@[0-9a-f]+$":
@ -32,22 +77,6 @@ patternProperties:
description:
The ID number for the child PHY. Should be +1 of parent PHY.
nxp,rmii-refclk-in:
type: boolean
description: |
The REF_CLK is provided for both transmitted and received data
in RMII mode. This clock signal is provided by the PHY and is
typically derived from an external 25MHz crystal. Alternatively,
a 50MHz clock signal generated by an external oscillator can be
connected to pin REF_CLK. A third option is to connect a 25MHz
clock to pin CLK_IN_OUT. So, the REF_CLK should be configured
as input or output according to the actual circuit connection.
If present, indicates that the REF_CLK will be configured as
interface reference clock input when RMII mode enabled.
If not present, the REF_CLK will be configured as interface
reference clock output when RMII mode enabled.
Only supported on TJA1100 and TJA1101.
required:
- reg
@ -60,6 +89,7 @@ examples:
#size-cells = <0>;
tja1101_phy0: ethernet-phy@4 {
compatible = "ethernet-phy-id0180.dc40";
reg = <0x4>;
nxp,rmii-refclk-in;
};