mirror of
https://github.com/torvalds/linux.git
synced 2026-06-08 14:42:37 +02:00
rk2928: move rk2928_sdk_defconfig(old) to rk2928_tb_defconfig: support rk2928 top board + rk3066 main board
This commit is contained in:
kfx
parent
ec6c1765a7
commit
2f5f5948c1
418
arch/arm/configs/rk2928_tb_defconfig
Normal file
418
arch/arm/configs/rk2928_tb_defconfig
Normal file
|
|
@ -0,0 +1,418 @@
|
|||
CONFIG_EXPERIMENTAL=y
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_KERNEL_LZO=y
|
||||
CONFIG_LOG_BUF_SHIFT=19
|
||||
CONFIG_CGROUPS=y
|
||||
CONFIG_CGROUP_DEBUG=y
|
||||
CONFIG_CGROUP_FREEZER=y
|
||||
CONFIG_CGROUP_CPUACCT=y
|
||||
CONFIG_RESOURCE_COUNTERS=y
|
||||
CONFIG_CGROUP_SCHED=y
|
||||
CONFIG_RT_GROUP_SCHED=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_PANIC_TIMEOUT=1
|
||||
# CONFIG_SYSCTL_SYSCALL is not set
|
||||
# CONFIG_ELF_CORE is not set
|
||||
CONFIG_ASHMEM=y
|
||||
# CONFIG_AIO is not set
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
CONFIG_ARCH_RK2928=y
|
||||
CONFIG_RK_CLOCK_PROC=y
|
||||
CONFIG_RK_USB_UART=y
|
||||
CONFIG_MACH_RK2928_TB=y
|
||||
CONFIG_FIQ_DEBUGGER=y
|
||||
CONFIG_FIQ_DEBUGGER_NO_SLEEP=y
|
||||
CONFIG_FIQ_DEBUGGER_CONSOLE=y
|
||||
CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_AEABI=y
|
||||
# CONFIG_OABI_COMPAT is not set
|
||||
CONFIG_HIGHMEM=y
|
||||
CONFIG_COMPACTION=y
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_CMDLINE="console=ttyFIQ0 androidboot.console=ttyFIQ0 init=/init"
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_NEON=y
|
||||
CONFIG_WAKELOCK=y
|
||||
CONFIG_PM_RUNTIME=y
|
||||
CONFIG_PM_DEBUG=y
|
||||
CONFIG_SUSPEND_TIME=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_MULTIPLE_TABLES=y
|
||||
CONFIG_INET_ESP=y
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_IPV6=y
|
||||
CONFIG_IPV6_PRIVACY=y
|
||||
CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_IPV6_OPTIMISTIC_DAD=y
|
||||
CONFIG_INET6_AH=y
|
||||
CONFIG_INET6_ESP=y
|
||||
CONFIG_INET6_IPCOMP=y
|
||||
CONFIG_IPV6_MIP6=y
|
||||
CONFIG_IPV6_TUNNEL=y
|
||||
CONFIG_IPV6_MULTIPLE_TABLES=y
|
||||
CONFIG_NETFILTER=y
|
||||
# CONFIG_BRIDGE_NETFILTER is not set
|
||||
CONFIG_NF_CONNTRACK=y
|
||||
CONFIG_NF_CONNTRACK_EVENTS=y
|
||||
CONFIG_NF_CT_PROTO_DCCP=y
|
||||
CONFIG_NF_CT_PROTO_SCTP=y
|
||||
CONFIG_NF_CT_PROTO_UDPLITE=y
|
||||
CONFIG_NF_CONNTRACK_AMANDA=y
|
||||
CONFIG_NF_CONNTRACK_FTP=y
|
||||
CONFIG_NF_CONNTRACK_H323=y
|
||||
CONFIG_NF_CONNTRACK_IRC=y
|
||||
CONFIG_NF_CONNTRACK_NETBIOS_NS=y
|
||||
CONFIG_NF_CONNTRACK_PPTP=y
|
||||
CONFIG_NF_CONNTRACK_SANE=y
|
||||
CONFIG_NF_CONNTRACK_SIP=y
|
||||
CONFIG_NF_CONNTRACK_TFTP=y
|
||||
CONFIG_NF_CT_NETLINK=y
|
||||
CONFIG_NETFILTER_TPROXY=y
|
||||
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
|
||||
CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
|
||||
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
|
||||
CONFIG_NETFILTER_XT_TARGET_MARK=y
|
||||
CONFIG_NETFILTER_XT_TARGET_NFLOG=y
|
||||
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
|
||||
CONFIG_NETFILTER_XT_TARGET_TPROXY=y
|
||||
CONFIG_NETFILTER_XT_TARGET_TRACE=y
|
||||
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
|
||||
CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y
|
||||
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
|
||||
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
|
||||
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
|
||||
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
|
||||
CONFIG_NETFILTER_XT_MATCH_HELPER=y
|
||||
CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
|
||||
CONFIG_NETFILTER_XT_MATCH_LENGTH=y
|
||||
CONFIG_NETFILTER_XT_MATCH_LIMIT=y
|
||||
CONFIG_NETFILTER_XT_MATCH_MAC=y
|
||||
CONFIG_NETFILTER_XT_MATCH_MARK=y
|
||||
CONFIG_NETFILTER_XT_MATCH_POLICY=y
|
||||
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
|
||||
CONFIG_NETFILTER_XT_MATCH_QTAGUID=y
|
||||
CONFIG_NETFILTER_XT_MATCH_QUOTA=y
|
||||
CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
|
||||
CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
|
||||
CONFIG_NETFILTER_XT_MATCH_SOCKET=y
|
||||
CONFIG_NETFILTER_XT_MATCH_STATE=y
|
||||
CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
|
||||
CONFIG_NETFILTER_XT_MATCH_STRING=y
|
||||
CONFIG_NETFILTER_XT_MATCH_TIME=y
|
||||
CONFIG_NETFILTER_XT_MATCH_U32=y
|
||||
CONFIG_NF_CONNTRACK_IPV4=y
|
||||
CONFIG_IP_NF_IPTABLES=y
|
||||
CONFIG_IP_NF_MATCH_AH=y
|
||||
CONFIG_IP_NF_MATCH_ECN=y
|
||||
CONFIG_IP_NF_MATCH_TTL=y
|
||||
CONFIG_IP_NF_FILTER=y
|
||||
CONFIG_IP_NF_TARGET_REJECT=y
|
||||
CONFIG_IP_NF_TARGET_REJECT_SKERR=y
|
||||
CONFIG_IP_NF_TARGET_LOG=y
|
||||
CONFIG_NF_NAT=y
|
||||
CONFIG_IP_NF_TARGET_MASQUERADE=y
|
||||
CONFIG_IP_NF_TARGET_NETMAP=y
|
||||
CONFIG_IP_NF_TARGET_REDIRECT=y
|
||||
CONFIG_IP_NF_MANGLE=y
|
||||
CONFIG_IP_NF_RAW=y
|
||||
CONFIG_IP_NF_ARPTABLES=y
|
||||
CONFIG_IP_NF_ARPFILTER=y
|
||||
CONFIG_IP_NF_ARP_MANGLE=y
|
||||
CONFIG_NF_CONNTRACK_IPV6=y
|
||||
CONFIG_IP6_NF_IPTABLES=y
|
||||
CONFIG_IP6_NF_TARGET_LOG=y
|
||||
CONFIG_IP6_NF_FILTER=y
|
||||
CONFIG_IP6_NF_TARGET_REJECT=y
|
||||
CONFIG_IP6_NF_TARGET_REJECT_SKERR=y
|
||||
CONFIG_IP6_NF_MANGLE=y
|
||||
CONFIG_IP6_NF_RAW=y
|
||||
CONFIG_BRIDGE=y
|
||||
# CONFIG_BRIDGE_IGMP_SNOOPING is not set
|
||||
CONFIG_PHONET=y
|
||||
CONFIG_NET_SCHED=y
|
||||
CONFIG_NET_SCH_HTB=y
|
||||
CONFIG_NET_SCH_INGRESS=y
|
||||
CONFIG_NET_CLS_U32=y
|
||||
CONFIG_NET_EMATCH=y
|
||||
CONFIG_NET_EMATCH_U32=y
|
||||
CONFIG_NET_CLS_ACT=y
|
||||
CONFIG_NET_ACT_POLICE=y
|
||||
CONFIG_NET_ACT_GACT=y
|
||||
CONFIG_NET_ACT_MIRRED=y
|
||||
CONFIG_BT=y
|
||||
CONFIG_BT_L2CAP=y
|
||||
CONFIG_BT_SCO=y
|
||||
CONFIG_BT_RFCOMM=y
|
||||
CONFIG_BT_RFCOMM_TTY=y
|
||||
CONFIG_BT_BNEP=y
|
||||
CONFIG_BT_HIDP=y
|
||||
CONFIG_BT_HCIUART=y
|
||||
CONFIG_BT_HCIUART_H4=y
|
||||
CONFIG_BT_HCIUART_LL=y
|
||||
CONFIG_BT_HCIBCM4325=y
|
||||
CONFIG_BT_AUTOSLEEP=y
|
||||
CONFIG_RFKILL=y
|
||||
CONFIG_RFKILL_RK=y
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_NAND_IDS=y
|
||||
CONFIG_MTD_RKNAND=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_MISC_DEVICES=y
|
||||
CONFIG_UID_STAT=y
|
||||
CONFIG_APANIC=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_SCSI_MULTI_LUN=y
|
||||
CONFIG_MD=y
|
||||
CONFIG_BLK_DEV_DM=y
|
||||
CONFIG_DM_CRYPT=y
|
||||
CONFIG_DM_UEVENT=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_PHYLIB=y
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
CONFIG_WLAN_80211=y
|
||||
CONFIG_RKWIFI=y
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_PPP=y
|
||||
CONFIG_PPP_MULTILINK=y
|
||||
CONFIG_PPP_FILTER=y
|
||||
CONFIG_PPP_ASYNC=y
|
||||
CONFIG_PPP_SYNC_TTY=y
|
||||
CONFIG_PPP_DEFLATE=y
|
||||
CONFIG_PPP_BSDCOMP=y
|
||||
CONFIG_PPP_MPPE=y
|
||||
CONFIG_PPPOLAC=y
|
||||
CONFIG_PPPOPNS=y
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
CONFIG_INPUT_KEYRESET=y
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_JOYSTICK=y
|
||||
CONFIG_JOYSTICK_XPAD=y
|
||||
CONFIG_JOYSTICK_XPAD_FF=y
|
||||
CONFIG_INPUT_TABLET=y
|
||||
CONFIG_TABLET_USB_ACECAD=y
|
||||
CONFIG_TABLET_USB_AIPTEK=y
|
||||
CONFIG_TABLET_USB_GTCO=y
|
||||
CONFIG_TABLET_USB_HANWANG=y
|
||||
CONFIG_TABLET_USB_KBTAB=y
|
||||
CONFIG_TABLET_USB_WACOM=y
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_EETI_EGALAX=y
|
||||
CONFIG_EETI_EGALAX_MAX_X=1087
|
||||
CONFIG_EETI_EGALAX_MAX_Y=800
|
||||
CONFIG_INPUT_MISC=y
|
||||
CONFIG_INPUT_KEYCHORD=y
|
||||
CONFIG_INPUT_UINPUT=y
|
||||
CONFIG_COMPASS_AK8975=y
|
||||
CONFIG_GS_MMA8452=y
|
||||
CONFIG_GYRO_L3G4200D=y
|
||||
CONFIG_LS_CM3217=y
|
||||
CONFIG_SENSOR_DEVICE=y
|
||||
CONFIG_GSENSOR_DEVICE=y
|
||||
CONFIG_COMPASS_DEVICE=y
|
||||
CONFIG_GYROSCOPE_DEVICE=y
|
||||
CONFIG_LIGHT_DEVICE=y
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_CONSOLE_TRANSLATIONS is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_RK29=y
|
||||
CONFIG_UART0_RK29=y
|
||||
CONFIG_UART0_CTS_RTS_RK29=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
# CONFIG_I2C_COMPAT is not set
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C0_CONTROLLER_RK30=y
|
||||
CONFIG_I2C1_CONTROLLER_RK30=y
|
||||
CONFIG_I2C2_CONTROLLER_RK30=y
|
||||
CONFIG_ADC_RK30=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_EXPANDED_GPIO_NUM=0
|
||||
CONFIG_EXPANDED_GPIO_IRQ_NUM=0
|
||||
CONFIG_SPI_FPGA_GPIO_NUM=0
|
||||
CONFIG_SPI_FPGA_GPIO_IRQ_NUM=0
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_TEST_POWER=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_MFD_TPS65910=y
|
||||
CONFIG_MFD_TPS65090=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_TPS65910=y
|
||||
CONFIG_RK30_PWM_REGULATOR=y
|
||||
CONFIG_MEDIA_SUPPORT=y
|
||||
CONFIG_VIDEO_DEV=y
|
||||
CONFIG_SOC_CAMERA=y
|
||||
CONFIG_SOC_CAMERA_OV2659=y
|
||||
CONFIG_SOC_CAMERA_OV5642=y
|
||||
CONFIG_VIDEO_RK29=y
|
||||
CONFIG_VIDEO_RK29_CAMMEM_ION=y
|
||||
CONFIG_ION=y
|
||||
CONFIG_ION_ROCKCHIP=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
# CONFIG_BACKLIGHT_GENERIC is not set
|
||||
CONFIG_DISPLAY_SUPPORT=y
|
||||
CONFIG_LCD_HSD100PXN=y
|
||||
CONFIG_FB_ROCKCHIP=y
|
||||
CONFIG_LCDC_RK2928=y
|
||||
CONFIG_RK_HDMI=y
|
||||
CONFIG_HDMI_RK2928=y
|
||||
CONFIG_RGA_RK30=y
|
||||
CONFIG_RK_LVDS=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
# CONFIG_SND_VERBOSE_PROCFS is not set
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
# CONFIG_SND_ARM is not set
|
||||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_RK29_SOC=y
|
||||
CONFIG_SND_I2S_DMA_EVENT_STATIC=y
|
||||
CONFIG_SND_RK_SOC_RK2928=y
|
||||
CONFIG_SND_RK29_CODEC_SOC_SLAVE=y
|
||||
CONFIG_HID_A4TECH=y
|
||||
CONFIG_HID_ACRUX=y
|
||||
CONFIG_HID_ACRUX_FF=y
|
||||
CONFIG_HID_APPLE=y
|
||||
CONFIG_HID_BELKIN=y
|
||||
CONFIG_HID_CHERRY=y
|
||||
CONFIG_HID_CHICONY=y
|
||||
CONFIG_HID_CYPRESS=y
|
||||
CONFIG_HID_DRAGONRISE=y
|
||||
CONFIG_DRAGONRISE_FF=y
|
||||
CONFIG_HID_EMS_FF=y
|
||||
CONFIG_HID_ELECOM=y
|
||||
CONFIG_HID_EZKEY=y
|
||||
CONFIG_HID_KEYTOUCH=y
|
||||
CONFIG_HID_KYE=y
|
||||
CONFIG_HID_UCLOGIC=y
|
||||
CONFIG_HID_WALTOP=y
|
||||
CONFIG_HID_GYRATION=y
|
||||
CONFIG_HID_TWINHAN=y
|
||||
CONFIG_HID_KENSINGTON=y
|
||||
CONFIG_HID_LCPOWER=y
|
||||
CONFIG_HID_LOGITECH=y
|
||||
CONFIG_LOGITECH_FF=y
|
||||
CONFIG_LOGIRUMBLEPAD2_FF=y
|
||||
CONFIG_LOGIG940_FF=y
|
||||
CONFIG_LOGIWII_FF=y
|
||||
CONFIG_HID_MAGICMOUSE=y
|
||||
CONFIG_HID_MICROSOFT=y
|
||||
CONFIG_HID_MONTEREY=y
|
||||
CONFIG_HID_MULTITOUCH=y
|
||||
CONFIG_HID_NTRIG=y
|
||||
CONFIG_HID_ORTEK=y
|
||||
CONFIG_HID_PANTHERLORD=y
|
||||
CONFIG_PANTHERLORD_FF=y
|
||||
CONFIG_HID_PETALYNX=y
|
||||
CONFIG_HID_PICOLCD=y
|
||||
CONFIG_HID_QUANTA=y
|
||||
CONFIG_HID_ROCCAT_ARVO=y
|
||||
CONFIG_HID_ROCCAT_KONE=y
|
||||
CONFIG_HID_ROCCAT_KONEPLUS=y
|
||||
CONFIG_HID_ROCCAT_KOVAPLUS=y
|
||||
CONFIG_HID_ROCCAT_PYRA=y
|
||||
CONFIG_HID_SAMSUNG=y
|
||||
CONFIG_HID_SONY=y
|
||||
CONFIG_HID_SUNPLUS=y
|
||||
CONFIG_HID_GREENASIA=y
|
||||
CONFIG_GREENASIA_FF=y
|
||||
CONFIG_HID_SMARTJOYPLUS=y
|
||||
CONFIG_SMARTJOYPLUS_FF=y
|
||||
CONFIG_HID_TOPSEED=y
|
||||
CONFIG_HID_THRUSTMASTER=y
|
||||
CONFIG_THRUSTMASTER_FF=y
|
||||
CONFIG_HID_WACOM=y
|
||||
CONFIG_HID_ZEROPLUS=y
|
||||
CONFIG_ZEROPLUS_FF=y
|
||||
CONFIG_HID_ZYDACRON=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_DEVICEFS=y
|
||||
CONFIG_USB_OTG_BLACKLIST_HUB=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_SERIAL=y
|
||||
CONFIG_USB_SERIAL_GENERIC=y
|
||||
CONFIG_USB_SERIAL_OPTION=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB20_HOST=y
|
||||
CONFIG_USB20_OTG=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_UNSAFE_RESUME=y
|
||||
CONFIG_MMC_EMBEDDED_SDIO=y
|
||||
CONFIG_MMC_PARANOID_SD_INIT=y
|
||||
CONFIG_SDMMC_RK29=y
|
||||
CONFIG_SWITCH=y
|
||||
CONFIG_SWITCH_GPIO=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_TPS65910_RTC=y
|
||||
CONFIG_STAGING=y
|
||||
CONFIG_ANDROID=y
|
||||
CONFIG_ANDROID_BINDER_IPC=y
|
||||
CONFIG_ANDROID_LOGGER=y
|
||||
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
|
||||
# CONFIG_CMMB is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_EXT4_FS_XATTR is not set
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
# CONFIG_NETWORK_FILESYSTEMS is not set
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
CONFIG_EFI_PARTITION=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ASCII=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_SCHEDSTATS=y
|
||||
# CONFIG_DEBUG_PREEMPT is not set
|
||||
# CONFIG_EVENT_POWER_TRACING_DEPRECATED is not set
|
||||
CONFIG_ENABLE_DEFAULT_TRACERS=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_TWOFISH=y
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
|
|
@ -8,8 +8,6 @@ config MACH_RK2928
|
|||
bool "RK2928 Board"
|
||||
select RK_CONFIG
|
||||
|
||||
config MACH_RK2928_FPGA
|
||||
bool "RK2928 FPGA board"
|
||||
|
||||
config MACH_RK2928_SDK
|
||||
bool "RK2928 SDK board"
|
||||
|
|
@ -17,18 +15,17 @@ config MACH_RK2928_SDK
|
|||
config MACH_RK2926_SDK
|
||||
bool "RK2926 SDK board"
|
||||
|
||||
config MACH_RK2928_PHONEPAD
|
||||
bool "RK2928_PhonePad board"
|
||||
|
||||
config MACH_RK2928_A720
|
||||
bool "RK2928 A720 board"
|
||||
|
||||
config MACH_RK2926_M713
|
||||
bool "RK2926 M713 board"
|
||||
depends on MACH_RK2928_A720
|
||||
default n
|
||||
help
|
||||
support rk2926 m713 board with pmu act8931
|
||||
config MACH_RK2928_TB
|
||||
bool "RK2928 top board"
|
||||
|
||||
config MACH_RK2928_PHONEPAD
|
||||
bool "RK2928_PhonePad board"
|
||||
config MACH_RK2928_FPGA
|
||||
bool "RK2928 FPGA board"
|
||||
|
||||
endchoice
|
||||
|
||||
|
|
|
|||
|
|
@ -17,8 +17,11 @@ obj-$(CONFIG_RK30_I2C_INSRAM) += i2c_sram.o
|
|||
|
||||
board-y := board-rk2928.o
|
||||
obj-$(CONFIG_MACH_RK2928) += board.o
|
||||
|
||||
obj-$(CONFIG_MACH_RK2928_SDK) += board-rk2928-sdk.o
|
||||
obj-$(CONFIG_MACH_RK2926_SDK) += board-rk2926-sdk.o
|
||||
obj-$(CONFIG_MACH_RK2928_A720) += board-rk2928-a720.o
|
||||
obj-$(CONFIG_MACH_RK2928_PHONEPAD) += board-rk2928-phonepad.o
|
||||
|
||||
obj-$(CONFIG_MACH_RK2928_A720) += board-rk2928-a720.o
|
||||
obj-$(CONFIG_MACH_RK2928_TB) += board-rk2928-tb.o
|
||||
obj-$(CONFIG_MACH_RK2928_FPGA) += board-rk2928-fpga.o
|
||||
|
|
|
|||
620
arch/arm/mach-rk2928/board-rk2928-tb-tps65910.c
Executable file
620
arch/arm/mach-rk2928/board-rk2928-tb-tps65910.c
Executable file
|
|
@ -0,0 +1,620 @@
|
|||
#include <linux/regulator/machine.h>
|
||||
#include <linux/i2c/twl.h>
|
||||
#include <linux/mfd/tps65910.h>
|
||||
#include <mach/sram.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <mach/gpio.h>
|
||||
#include <mach/iomux.h>
|
||||
|
||||
#define gpio_readl(offset) readl_relaxed(RK2928_GPIO3_BASE + offset)
|
||||
#define gpio_writel(v, offset) do { writel_relaxed(v, RK2928_GPIO3_BASE + offset); dsb(); } while (0)
|
||||
|
||||
#define GPIO_SWPORTA_DR 0x0000
|
||||
#define GPIO_SWPORTA_DDR 0x0004
|
||||
|
||||
#define GPIO3_D2_OUTPUT (1<<26)
|
||||
#define GPIO3_D2_OUTPUT_HIGH (1<<26)
|
||||
#define GPIO3_D2_OUTPUT_LOW (~(1<<26))
|
||||
|
||||
#ifdef CONFIG_MFD_TPS65910
|
||||
#define PMU_POWER_SLEEP RK2928_PIN3_PD2
|
||||
extern int platform_device_register(struct platform_device *pdev);
|
||||
|
||||
int tps65910_pre_init(struct tps65910 *tps65910){
|
||||
|
||||
int val = 0;
|
||||
int i = 0;
|
||||
int err = -1;
|
||||
|
||||
printk("%s,line=%d\n", __func__,__LINE__);
|
||||
gpio_request(PMU_POWER_SLEEP, "NULL");
|
||||
gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
|
||||
|
||||
val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
|
||||
if (val<0) {
|
||||
printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
|
||||
return val;
|
||||
}
|
||||
/* Set sleep state active high and allow device turn-off after PWRON long press */
|
||||
val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
|
||||
|
||||
err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
|
||||
return err;
|
||||
}
|
||||
#if 1
|
||||
/* set PSKIP=0 */
|
||||
val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
|
||||
if (val<0) {
|
||||
printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
|
||||
return val;
|
||||
}
|
||||
|
||||
val &= ~DEVCTRL_DEV_OFF_MASK;
|
||||
val &= ~DEVCTRL_DEV_SLP_MASK;
|
||||
err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
|
||||
return err;
|
||||
}
|
||||
#endif
|
||||
/* Set the maxinum load current */
|
||||
/* VDD1 */
|
||||
val = tps65910_reg_read(tps65910, TPS65910_VDD1);
|
||||
if (val<0) {
|
||||
printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
|
||||
return val;
|
||||
}
|
||||
|
||||
val |= (1<<5); //when 1: 1.5 A
|
||||
val |= (0x07<<2); //TSTEP[2:0] = 111 : 2.5 mV/|¨¬s(sampling 3 Mhz/5)
|
||||
err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
/* VDD2 */
|
||||
val = tps65910_reg_read(tps65910, TPS65910_VDD2);
|
||||
if (val<0) {
|
||||
printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
|
||||
return val;
|
||||
}
|
||||
|
||||
val |= (1<<5); //when 1: 1.5 A
|
||||
err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
/* VIO */
|
||||
val = tps65910_reg_read(tps65910, TPS65910_VIO);
|
||||
if (val<0) {
|
||||
printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
val |= (1<<6); //when 01: 1.0 A
|
||||
err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
|
||||
return err;
|
||||
}
|
||||
#if 1
|
||||
/* Mask ALL interrupts */
|
||||
err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
|
||||
#if 1
|
||||
val = 0;
|
||||
val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
|
||||
err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
|
||||
return err;
|
||||
}
|
||||
printk(KERN_INFO "TPS65910 Set default voltage.\n");
|
||||
#endif
|
||||
#if 0
|
||||
//read sleep control register for debug
|
||||
for(i=0; i<6; i++)
|
||||
{
|
||||
err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
|
||||
return -EIO;
|
||||
}
|
||||
else
|
||||
printk("%s.......is 0x%04x\n",__FUNCTION__,val);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if 1
|
||||
//sleep control register
|
||||
/*set func when in sleep mode */
|
||||
val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
|
||||
if (val<0) {
|
||||
printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
|
||||
return val;
|
||||
}
|
||||
|
||||
val |= (1 << 1);
|
||||
err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
|
||||
\n", TPS65910_VDIG1);
|
||||
return err;
|
||||
}
|
||||
|
||||
/* open ldo when in sleep mode */
|
||||
val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
|
||||
if (val<0) {
|
||||
printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
|
||||
return val;
|
||||
}
|
||||
|
||||
val &= 0;
|
||||
err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
|
||||
\n", TPS65910_VDIG1);
|
||||
return err;
|
||||
}
|
||||
|
||||
/*set dc mode when in sleep mode */
|
||||
val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
|
||||
if (val<0) {
|
||||
printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
|
||||
return val;
|
||||
}
|
||||
|
||||
val |= 0xff;
|
||||
err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
|
||||
\n", TPS65910_VDIG1);
|
||||
return err;
|
||||
}
|
||||
|
||||
/*close ldo when in sleep mode */
|
||||
val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
|
||||
if (val<0) {
|
||||
printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
|
||||
return val;
|
||||
}
|
||||
|
||||
val |= 0x9B;
|
||||
err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
|
||||
\n", TPS65910_VDIG1);
|
||||
return err;
|
||||
}
|
||||
|
||||
#endif
|
||||
#if 0
|
||||
//read sleep control register for debug
|
||||
for(i=0; i<6; i++)
|
||||
{
|
||||
err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
|
||||
if (err) {
|
||||
printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
|
||||
return -EIO;
|
||||
}
|
||||
else
|
||||
printk("%s.......is 0x%4x\n",__FUNCTION__,val);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
printk("%s,line=%d\n", __func__,__LINE__);
|
||||
return 0;
|
||||
|
||||
}
|
||||
int tps65910_post_init(struct tps65910 *tps65910)
|
||||
{
|
||||
struct regulator *dcdc;
|
||||
struct regulator *ldo;
|
||||
printk("%s,line=%d\n", __func__,__LINE__);
|
||||
|
||||
#ifdef CONFIG_RK30_PWM_REGULATOR
|
||||
platform_device_register(&pwm_regulator_device[0]);
|
||||
#endif
|
||||
|
||||
dcdc = regulator_get(NULL, "vio"); //vcc_io
|
||||
regulator_set_voltage(dcdc, 3300000, 3300000);
|
||||
regulator_enable(dcdc);
|
||||
printk("%s set vio vcc_io=%dmV end\n", __func__, regulator_get_voltage(dcdc));
|
||||
regulator_put(dcdc);
|
||||
udelay(100);
|
||||
|
||||
ldo = regulator_get(NULL, "vpll"); // vcc25
|
||||
regulator_set_voltage(ldo, 2500000, 2500000);
|
||||
regulator_enable(ldo);
|
||||
printk("%s set vpll vcc25=%dmV end\n", __func__, regulator_get_voltage(ldo));
|
||||
regulator_put(ldo);
|
||||
udelay(100);
|
||||
|
||||
ldo = regulator_get(NULL, "vdig2"); // vdd12
|
||||
regulator_set_voltage(ldo, 1200000, 1200000);
|
||||
regulator_enable(ldo);
|
||||
printk("%s set vdig2 vdd12=%dmV end\n", __func__, regulator_get_voltage(ldo));
|
||||
regulator_put(ldo);
|
||||
udelay(100);
|
||||
|
||||
ldo = regulator_get(NULL, "vaux33"); //vcc_tp
|
||||
regulator_set_voltage(ldo, 3300000, 3300000);
|
||||
regulator_enable(ldo);
|
||||
printk("%s set vaux33 vcc_tp=%dmV end\n", __func__, regulator_get_voltage(ldo));
|
||||
regulator_put(ldo);
|
||||
udelay(100);
|
||||
|
||||
dcdc = regulator_get(NULL, "vdd_cpu"); //vdd_cpu
|
||||
regulator_set_voltage(dcdc, 1200000, 1200000);
|
||||
regulator_enable(dcdc);
|
||||
printk("%s set vdd1 vdd_cpu=%dmV end\n", __func__, regulator_get_voltage(dcdc));
|
||||
regulator_put(dcdc);
|
||||
udelay(100);
|
||||
|
||||
dcdc = regulator_get(NULL, "vdd2"); //vcc_ddr
|
||||
regulator_set_voltage(dcdc, 1200000, 1200000); // 1.5*4/5 = 1.2 and Vout=1.5v
|
||||
regulator_enable(dcdc);
|
||||
printk("%s set vdd2 vcc_ddr=%dmV end\n", __func__, regulator_get_voltage(dcdc));
|
||||
regulator_put(dcdc);
|
||||
udelay(100);
|
||||
|
||||
ldo = regulator_get(NULL, "vdig1"); //vcc18_cif
|
||||
regulator_set_voltage(ldo, 1800000, 1800000);
|
||||
regulator_enable(ldo);
|
||||
printk("%s set vdig1 vcc18_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
|
||||
regulator_put(ldo);
|
||||
udelay(100);
|
||||
|
||||
dcdc = regulator_get(NULL, "vaux1"); //vcc28_cif
|
||||
regulator_set_voltage(dcdc,2800000,2800000);
|
||||
regulator_enable(dcdc);
|
||||
printk("%s set vaux1 vcc28_cif=%dmV end\n", __func__, regulator_get_voltage(dcdc));
|
||||
regulator_put(dcdc);
|
||||
udelay(100);
|
||||
|
||||
ldo = regulator_get(NULL, "vaux2"); //vcca33
|
||||
regulator_set_voltage(ldo, 3300000, 3300000);
|
||||
regulator_enable(ldo);
|
||||
printk("%s set vaux2 vcca33=%dmV end\n", __func__, regulator_get_voltage(ldo));
|
||||
regulator_put(ldo);
|
||||
udelay(100);
|
||||
|
||||
ldo = regulator_get(NULL, "vdac"); //
|
||||
regulator_set_voltage(ldo,1800000,1800000);
|
||||
regulator_enable(ldo);
|
||||
printk("%s set vdac =%dmV end\n", __func__, regulator_get_voltage(ldo));
|
||||
regulator_put(ldo);
|
||||
udelay(100);
|
||||
|
||||
ldo = regulator_get(NULL, "vmmc"); //vccio_wl
|
||||
regulator_set_voltage(ldo,3300000,3300000);
|
||||
regulator_enable(ldo);
|
||||
printk("%s set vmmc vccio_wl=%dmV end\n", __func__, regulator_get_voltage(ldo));
|
||||
regulator_put(ldo);
|
||||
udelay(100);
|
||||
|
||||
printk("%s,line=%d END\n", __func__,__LINE__);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct regulator_consumer_supply tps65910_smps1_supply[] = {
|
||||
{
|
||||
.supply = "vdd1",
|
||||
},
|
||||
{
|
||||
.supply = "vdd_cpu",
|
||||
},
|
||||
};
|
||||
static struct regulator_consumer_supply tps65910_smps2_supply[] = {
|
||||
{
|
||||
.supply = "vdd2",
|
||||
},
|
||||
|
||||
};
|
||||
static struct regulator_consumer_supply tps65910_smps3_supply[] = {
|
||||
{
|
||||
.supply = "vdd3",
|
||||
},
|
||||
};
|
||||
static struct regulator_consumer_supply tps65910_smps4_supply[] = {
|
||||
{
|
||||
.supply = "vio",
|
||||
},
|
||||
};
|
||||
static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
|
||||
{
|
||||
.supply = "vdig1",
|
||||
},
|
||||
};
|
||||
static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
|
||||
{
|
||||
.supply = "vdig2",
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
|
||||
{
|
||||
.supply = "vaux1",
|
||||
},
|
||||
};
|
||||
static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
|
||||
{
|
||||
.supply = "vaux2",
|
||||
},
|
||||
};
|
||||
static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
|
||||
{
|
||||
.supply = "vaux33",
|
||||
},
|
||||
};
|
||||
static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
|
||||
{
|
||||
.supply = "vmmc",
|
||||
},
|
||||
};
|
||||
static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
|
||||
{
|
||||
.supply = "vdac",
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
|
||||
{
|
||||
.supply = "vpll",
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data tps65910_smps1 = {
|
||||
.constraints = {
|
||||
.name = "VDD1",
|
||||
.min_uV = 600000,
|
||||
.max_uV = 1500000,
|
||||
.apply_uV = 1,
|
||||
.always_on = 1,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
|
||||
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
|
||||
.consumer_supplies = tps65910_smps1_supply,
|
||||
};
|
||||
|
||||
/* */
|
||||
static struct regulator_init_data tps65910_smps2 = {
|
||||
.constraints = {
|
||||
.name = "VDD2",
|
||||
.min_uV = 600000,
|
||||
.max_uV = 1500000,
|
||||
.apply_uV = 1,
|
||||
.always_on = 1,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
|
||||
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
|
||||
.consumer_supplies = tps65910_smps2_supply,
|
||||
};
|
||||
|
||||
/* */
|
||||
static struct regulator_init_data tps65910_smps3 = {
|
||||
.constraints = {
|
||||
.name = "VDD3",
|
||||
.min_uV = 1000000,
|
||||
.max_uV = 1400000,
|
||||
.apply_uV = 1,
|
||||
.always_on = 1,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
|
||||
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
|
||||
.consumer_supplies = tps65910_smps3_supply,
|
||||
};
|
||||
|
||||
static struct regulator_init_data tps65910_smps4 = {
|
||||
.constraints = {
|
||||
.name = "VIO",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 3300000,
|
||||
.apply_uV = 1,
|
||||
.always_on = 1,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
|
||||
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
|
||||
.consumer_supplies = tps65910_smps4_supply,
|
||||
};
|
||||
static struct regulator_init_data tps65910_ldo1 = {
|
||||
.constraints = {
|
||||
.name = "VDIG1",
|
||||
.min_uV = 1200000,
|
||||
.max_uV = 2700000,
|
||||
.apply_uV = 1,
|
||||
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
|
||||
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
|
||||
.consumer_supplies = tps65910_ldo1_supply,
|
||||
};
|
||||
|
||||
/* */
|
||||
static struct regulator_init_data tps65910_ldo2 = {
|
||||
.constraints = {
|
||||
.name = "VDIG2",
|
||||
.min_uV = 1000000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = 1,
|
||||
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
|
||||
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
|
||||
.consumer_supplies = tps65910_ldo2_supply,
|
||||
};
|
||||
|
||||
/* */
|
||||
static struct regulator_init_data tps65910_ldo3 = {
|
||||
.constraints = {
|
||||
.name = "VAUX1",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 3300000,
|
||||
.apply_uV = 1,
|
||||
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
|
||||
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
|
||||
.consumer_supplies = tps65910_ldo3_supply,
|
||||
};
|
||||
|
||||
/* */
|
||||
static struct regulator_init_data tps65910_ldo4 = {
|
||||
.constraints = {
|
||||
.name = "VAUX2",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 3300000,
|
||||
.apply_uV = 1,
|
||||
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
|
||||
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
|
||||
.consumer_supplies = tps65910_ldo4_supply,
|
||||
};
|
||||
|
||||
/* */
|
||||
static struct regulator_init_data tps65910_ldo5 = {
|
||||
.constraints = {
|
||||
.name = "VAUX33",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 3300000,
|
||||
.apply_uV = 1,
|
||||
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
|
||||
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
|
||||
.consumer_supplies = tps65910_ldo5_supply,
|
||||
};
|
||||
|
||||
/* */
|
||||
static struct regulator_init_data tps65910_ldo6 = {
|
||||
.constraints = {
|
||||
.name = "VMMC",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 3300000,
|
||||
.apply_uV = 1,
|
||||
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
|
||||
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
|
||||
.consumer_supplies = tps65910_ldo6_supply,
|
||||
};
|
||||
|
||||
/* */
|
||||
static struct regulator_init_data tps65910_ldo7 = {
|
||||
.constraints = {
|
||||
.name = "VDAC",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 2850000,
|
||||
.apply_uV = 1,
|
||||
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
|
||||
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
|
||||
.consumer_supplies = tps65910_ldo7_supply,
|
||||
};
|
||||
|
||||
/* */
|
||||
static struct regulator_init_data tps65910_ldo8 = {
|
||||
.constraints = {
|
||||
.name = "VPLL",
|
||||
.min_uV = 1000000,
|
||||
.max_uV = 2500000,
|
||||
.apply_uV = 1,
|
||||
.always_on = 1,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
|
||||
.valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
|
||||
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
|
||||
.consumer_supplies = tps65910_ldo8_supply,
|
||||
};
|
||||
|
||||
void __sramfunc board_pmu_suspend(void)
|
||||
{
|
||||
int ret;
|
||||
ret = gpio_readl(GPIO_SWPORTA_DDR);
|
||||
gpio_writel(ret | GPIO3_D2_OUTPUT, GPIO_SWPORTA_DDR);
|
||||
ret = gpio_readl(GPIO_SWPORTA_DR);
|
||||
gpio_writel(ret | GPIO3_D2_OUTPUT_HIGH, GPIO_SWPORTA_DR); //set pmu_sleep output high
|
||||
}
|
||||
void __sramfunc board_pmu_resume(void)
|
||||
{
|
||||
int ret;
|
||||
ret = gpio_readl(GPIO_SWPORTA_DDR);
|
||||
gpio_writel(ret | GPIO3_D2_OUTPUT, GPIO_SWPORTA_DDR);
|
||||
ret = gpio_readl(GPIO_SWPORTA_DR);
|
||||
gpio_writel(ret & GPIO3_D2_OUTPUT_LOW, GPIO_SWPORTA_DR); //set pmu_sleep output low
|
||||
sram_udelay(2000);
|
||||
}
|
||||
|
||||
static struct tps65910_board tps65910_data = {
|
||||
.irq = (unsigned)TPS65910_HOST_IRQ,
|
||||
.irq_base = NR_GIC_IRQS + NR_GPIO_IRQS,
|
||||
.gpio_base = TPS65910_GPIO_EXPANDER_BASE,
|
||||
|
||||
.pre_init = tps65910_pre_init,
|
||||
.post_init = tps65910_post_init,
|
||||
|
||||
//TPS65910_NUM_REGS = 13
|
||||
// Regulators
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
|
||||
.tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,
|
||||
|
||||
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
1041
arch/arm/mach-rk2928/board-rk2928-tb.c
Executable file
1041
arch/arm/mach-rk2928/board-rk2928-tb.c
Executable file
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user