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Merge branches 'pm-cpuidle' and 'pm-powercap'
Merge cpuidle and power capping updates for 7.4: - Prevent cpuidle governors menu and teo from returning idle state 0 after it has been disabled (Xueqin Luo) - Replace min_t() with the better alternatives in the intel_idle driver and make it use 2-argument strscpy() (Andy Shevchenko) - Fix two repeated phrase instances in cpuidle (Hemanth Selam, Syazwina Fazrul) - Add rugged Panther Lake support to the intel_rapl power capping driver and make it use %pe for printing error pointers (Srinivas Pandruvada and Sumeet Pawnikar) * pm-cpuidle: Documentation: power/cpuidle: Fix repeating phrase cpuidle: tegra: fix repeated word 'that' in comment cpuidle: teo: Do not return a disabled idle state cpuidle: menu: Do not return a disabled idle state intel_idle: Use 2-argument strscpy() intel_idle: Replace min_t() with the better alternatives * pm-powercap: powercap: intel_rapl: Use %pe to print error pointers symbolically powercap: intel_rapl: Add rugged Panther Lake support
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commit
2f0ba6f43a
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@ -316,7 +316,7 @@ interval" value.
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Now, the governor is ready to walk the list of idle states and choose one of
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them. For this purpose, it compares the target residency of each state with
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the predicted idle duration and the exit latency of it with the with the latency
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the predicted idle duration and the exit latency of it with the latency
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limit coming from the power management quality of service, or `PM QoS <cpu-pm-qos_>`_,
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framework. It selects the state with the target residency closest to the predicted
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idle duration, but still below it, and exit latency that does not exceed the
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@ -281,7 +281,7 @@ static int tegra114_enter_s2idle(struct cpuidle_device *dev,
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* LP2 | C7 (CPU core power gating)
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* LP2 | CC6 (CPU cluster power gating)
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*
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* Note that that the older CPUIDLE driver versions didn't explicitly
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* Note that the older CPUIDLE driver versions didn't explicitly
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* differentiate the LP2 states because these states either used the same
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* code path or because CC6 wasn't supported.
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*/
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@ -284,10 +284,10 @@ static int menu_select(struct cpuidle_driver *drv, struct cpuidle_device *dev,
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data->bucket = BUCKETS - 1;
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}
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if (latency_req == 0 ||
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((data->next_timer_ns < drv->states[1].target_residency_ns ||
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latency_req < drv->states[1].exit_latency_ns) &&
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!dev->states_usage[0].disable)) {
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if (!dev->states_usage[0].disable &&
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(latency_req == 0 ||
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data->next_timer_ns < drv->states[1].target_residency_ns ||
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latency_req < drv->states[1].exit_latency_ns)) {
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/*
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* In this case state[0] will be used no matter what, so return
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* it right away and keep the tick running if state[0] is a
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@ -426,6 +426,17 @@ static int teo_select(struct cpuidle_driver *drv, struct cpuidle_device *dev,
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}
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}
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/*
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* If the latency constraint does not allow any of the enabled idle
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* states to be used, the candidate state index will be capped to 0
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* by the check below, but state 0 may be disabled. To prevent the
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* selection of a disabled state in that case, ensure that
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* constraint_idx is at least equal to the index of the first
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* enabled idle state.
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*/
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if (constraint_idx < idx0)
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constraint_idx = idx0;
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/*
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* If there is a latency constraint, it may be necessary to select an
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* idle state shallower than the current candidate one.
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@ -1792,9 +1792,7 @@ static bool __init intel_idle_cst_usable(void)
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{
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int cstate, limit;
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limit = min_t(int, min_t(int, CPUIDLE_STATE_MAX, max_cstate + 1),
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acpi_state_table.count);
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limit = min3(CPUIDLE_STATE_MAX, max_cstate + 1, acpi_state_table.count);
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for (cstate = 1; cstate < limit; cstate++) {
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struct acpi_processor_cx *cx = &acpi_state_table.states[cstate];
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@ -1906,7 +1904,7 @@ static void __init intel_idle_init_cstates_acpi_lpi(struct cpuidle_driver *drv)
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state = &drv->states[drv->state_count++];
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scnprintf(state->name, CPUIDLE_NAME_LEN, "C%d_LPI", index + 1);
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strscpy(state->desc, lpi_state->desc, CPUIDLE_DESC_LEN);
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strscpy(state->desc, lpi_state->desc);
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state->exit_latency = lpi_state->wake_latency;
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state->target_residency = lpi_state->min_residency;
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state->flags = MWAIT2flg(lpi_state->address);
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@ -1938,7 +1936,7 @@ static void __init intel_idle_init_cstates_acpi_lpi(struct cpuidle_driver *drv)
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static void __init intel_idle_init_cstates_acpi_cst(struct cpuidle_driver *drv)
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{
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int cstate, limit = min_t(int, CPUIDLE_STATE_MAX, acpi_state_table.count);
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int cstate, limit = min(CPUIDLE_STATE_MAX, acpi_state_table.count);
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/*
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* If limit > 0, intel_idle_cst_usable() has returned 'true', so all of
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@ -1956,7 +1954,7 @@ static void __init intel_idle_init_cstates_acpi_cst(struct cpuidle_driver *drv)
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state = &drv->states[drv->state_count++];
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snprintf(state->name, CPUIDLE_NAME_LEN, "C%d_ACPI", cstate);
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strscpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
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strscpy(state->desc, cx->desc);
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state->exit_latency = cx->latency;
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/*
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* For C1-type C-states use the same number for both the exit
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@ -2018,7 +2016,7 @@ static bool __init intel_idle_off_by_default_lpi(unsigned int flags, u32 mwait_h
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static bool __init intel_idle_off_by_default_cst(unsigned int flags, u32 mwait_hint)
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{
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int cstate, limit = min_t(int, CPUIDLE_STATE_MAX, acpi_state_table.count);
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int cstate, limit = min(CPUIDLE_STATE_MAX, acpi_state_table.count);
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/*
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* If limit > 0, intel_idle_cst_usable() has returned 'true', so all of
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@ -456,6 +456,7 @@ static const struct x86_cpu_id rapl_ids[] = {
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X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &rapl_defaults_spr_server),
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X86_MATCH_VFM(INTEL_LUNARLAKE_M, &rapl_defaults_core),
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X86_MATCH_VFM(INTEL_PANTHERLAKE_L, &rapl_defaults_core_pl4_pmu),
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X86_MATCH_VFM(INTEL_PANTHERLAKE_R, &rapl_defaults_core_pl4_pmu),
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X86_MATCH_VFM(INTEL_WILDCATLAKE_L, &rapl_defaults_core_pl4_pmu),
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X86_MATCH_VFM(INTEL_NOVALAKE, &rapl_defaults_core_pl4),
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X86_MATCH_VFM(INTEL_NOVALAKE_L, &rapl_defaults_core_pl4),
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@ -582,8 +583,8 @@ static int intel_rapl_msr_init(void)
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rapl_msr_platdev = platform_device_register_data(NULL, "intel_rapl_msr", 0, def,
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sizeof(*def));
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if (IS_ERR(rapl_msr_platdev))
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pr_debug("intel_rapl_msr device register failed, ret:%ld\n",
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PTR_ERR(rapl_msr_platdev));
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pr_debug("intel_rapl_msr device register failed, ret:%pe\n",
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rapl_msr_platdev);
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return 0;
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}
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