arm64: dts: marvell: align SPI NOR node name with dtschema

The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220407143234.295426-2-krzysztof.kozlowski@linaro.org
This commit is contained in:
Krzysztof Kozlowski 2022-04-07 16:32:34 +02:00
parent 402eb8ec54
commit 2f00bb4a69
12 changed files with 14 additions and 14 deletions

View File

@ -164,7 +164,7 @@ &spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
m25p80@0 {
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <108000000>;

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@ -211,7 +211,7 @@ &spi0 {
assigned-clock-parents = <&tbg 1>;
assigned-clock-rates = <20000000>;
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

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@ -99,7 +99,7 @@ &spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
m25p80@0 {
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <54000000>;

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@ -83,7 +83,7 @@ &i2c0 {
&spi0 {
status = "okay";
spi-flash@0 {
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
@ -186,7 +186,7 @@ partition@1000000 {
&cp0_spi1 {
status = "okay";
spi-flash@0 {
flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-max-frequency = <20000000>;

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@ -155,7 +155,7 @@ &cp0_spi1{
pinctrl-names = "default";
pinctrl-0 = <&cp0_spi1_pins>;
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

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@ -589,7 +589,7 @@ &cp1_spi1 {
pinctrl-0 = <&cp1_spi1_pins>;
status = "okay";
spi-flash@0 {
flash@0 {
compatible = "st,w25q32";
spi-max-frequency = <50000000>;
reg = <0>;

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@ -72,7 +72,7 @@ cp1_usb3_0_phy: cp1-usb3-0-phy {
&spi0 {
status = "okay";
spi-flash@0 {
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
@ -238,7 +238,7 @@ &cp1_i2c0 {
&cp1_spi1 {
status = "okay";
spi-flash@0 {
flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-max-frequency = <20000000>;

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@ -360,7 +360,7 @@ &cp1_spi1 {
pinctrl-0 = <&cp1_spi1_pins>;
status = "okay";
spi-flash@0 {
flash@0 {
compatible = "st,w25q32";
spi-max-frequency = <50000000>;
reg = <0>;

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@ -185,7 +185,7 @@ rtc@32 {
&spi0 {
status = "okay";
spi-flash@0 {
flash@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "jedec,spi-nor";

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@ -175,7 +175,7 @@ &cp0_spi1 {
<0x2000000 0x1000000>; /* CS0 */
status = "okay";
spi-flash@0 {
flash@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "jedec,spi-nor";

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@ -310,7 +310,7 @@ &cp0_spi1 {
pinctrl-0 = <&cp0_spi0_pins>;
reg = <0x700680 0x50>;
spi-flash@0 {
flash@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "jedec,spi-nor";

View File

@ -137,7 +137,7 @@ &cp1_spi1 {
pinctrl-0 = <&cp1_spi0_pins>;
reg = <0x700680 0x50>;
spi-flash@0 {
flash@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "jedec,spi-nor";