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arm64: dts: exynos: Add SPI nodes for Exynos850

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Some USI blocks can be configured as SPI controllers. Add corresponding
SPI nodes to Exynos850 SoC device tree.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240201183025.14566-1-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Sam Protsenko 2024-02-01 12:30:25 -06:00 committed by Krzysztof Kozlowski
parent c0fe557853
commit 2ef4cddd31
1 changed files with 54 additions and 0 deletions
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54
arch/arm64/boot/dts/exynos/exynos850.dtsi
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@ -738,6 +738,24 @@ usi_spi_0: usi@139400c0 {
<&cmu_peri CLK_GOUT_SPI0_IPCLK>;
clock-names = "pclk", "ipclk";
status = "disabled";
spi_0: spi@13940000 {
compatible = "samsung,exynos850-spi";
reg = <0x13940000 0x30>;
clocks = <&cmu_peri CLK_GOUT_SPI0_PCLK>,
<&cmu_peri CLK_GOUT_SPI0_IPCLK>;
clock-names = "spi", "spi_busclk0";
dmas = <&pdma0 5>, <&pdma0 4>;
dma-names = "tx", "rx";
interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&spi0_pins>;
pinctrl-names = "default";
num-cs = <1>;
samsung,spi-src-clk = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_cmgp0: usi@11d000c0 {
@ -779,6 +797,24 @@ serial_1: serial@11d00000 {
clock-names = "uart", "clk_uart_baud0";
status = "disabled";
};
spi_1: spi@11d00000 {
compatible = "samsung,exynos850-spi";
reg = <0x11d00000 0x30>;
clocks = <&cmu_cmgp CLK_GOUT_CMGP_USI0_PCLK>,
<&cmu_cmgp CLK_GOUT_CMGP_USI0_IPCLK>;
clock-names = "spi", "spi_busclk0";
dmas = <&pdma0 12>, <&pdma0 13>;
dma-names = "tx", "rx";
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&spi1_pins>;
pinctrl-names = "default";
num-cs = <1>;
samsung,spi-src-clk = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_cmgp1: usi@11d200c0 {
@ -820,6 +856,24 @@ serial_2: serial@11d20000 {
clock-names = "uart", "clk_uart_baud0";
status = "disabled";
};
spi_2: spi@11d20000 {
compatible = "samsung,exynos850-spi";
reg = <0x11d20000 0x30>;
clocks = <&cmu_cmgp CLK_GOUT_CMGP_USI1_PCLK>,
<&cmu_cmgp CLK_GOUT_CMGP_USI1_IPCLK>;
clock-names = "spi", "spi_busclk0";
dmas = <&pdma0 14>, <&pdma0 15>;
dma-names = "tx", "rx";
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&spi2_pins>;
pinctrl-names = "default";
num-cs = <1>;
samsung,spi-src-clk = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
};
};