mirror of
https://github.com/torvalds/linux.git
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Snap for 9133775 from a30b06d13a to android-mainline-keystone-qcom-release
Change-Id: I888530669e014659a3b219e6deb8760a9e055350
This commit is contained in:
Android Build Coastguard Worker
commit
2ed3634d0d
4
.mailmap
4
.mailmap
|
|
@ -71,6 +71,9 @@ Ben M Cahill <ben.m.cahill@intel.com>
|
|||
Ben Widawsky <bwidawsk@kernel.org> <ben@bwidawsk.net>
|
||||
Ben Widawsky <bwidawsk@kernel.org> <ben.widawsky@intel.com>
|
||||
Ben Widawsky <bwidawsk@kernel.org> <benjamin.widawsky@intel.com>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn@kryo.se>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@linaro.org>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@sonymobile.com>
|
||||
Björn Steinbrink <B.Steinbrink@gmx.de>
|
||||
Björn Töpel <bjorn@kernel.org> <bjorn.topel@gmail.com>
|
||||
Björn Töpel <bjorn@kernel.org> <bjorn.topel@intel.com>
|
||||
|
|
@ -315,6 +318,7 @@ Morten Welinder <welinder@troll.com>
|
|||
Mythri P K <mythripk@ti.com>
|
||||
Nadia Yvette Chambers <nyc@holomorphy.com> William Lee Irwin III <wli@holomorphy.com>
|
||||
Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com>
|
||||
Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com>
|
||||
Nguyen Anh Quynh <aquynh@gmail.com>
|
||||
Nicholas Piggin <npiggin@gmail.com> <npiggen@suse.de>
|
||||
Nicholas Piggin <npiggin@gmail.com> <npiggin@kernel.dk>
|
||||
|
|
|
|||
|
|
@ -47,7 +47,6 @@ define_db845c(
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|||
"crypto/michael_mic.ko",
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||||
"drivers/base/regmap/regmap-sdw.ko",
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||||
"drivers/base/regmap/regmap-slimbus.ko",
|
||||
"drivers/base/regmap/regmap-spmi.ko",
|
||||
"drivers/bus/mhi/host/mhi.ko",
|
||||
"drivers/clk/qcom/clk-qcom.ko",
|
||||
"drivers/clk/qcom/clk-rpmh.ko",
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson Firmware registers Interface
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||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
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||||
- Neil Armstrong <neil.armstrong@linaro.org>
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||||
|
||||
description: |
|
||||
The Meson SoCs have a register bank with status and data shared with the
|
||||
|
|
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|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
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||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/sound/name-prefix.yaml#
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||||
|
|
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|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
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|||
title: Amlogic Meson Display Controller
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||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
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||||
- Neil Armstrong <neil.armstrong@linaro.org>
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||||
|
||||
description: |
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||||
The Amlogic Meson Display controller is composed of several components
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|
|
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|||
|
|
@ -8,7 +8,7 @@ title: Analogix ANX7814 SlimPort (Full-HD Transmitter)
|
|||
|
||||
maintainers:
|
||||
- Andrzej Hajda <andrzej.hajda@intel.com>
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
- Robert Foss <robert.foss@linaro.org>
|
||||
|
||||
properties:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ title: ITE it66121 HDMI bridge Device Tree Bindings
|
|||
|
||||
maintainers:
|
||||
- Phong LE <ple@baylibre.com>
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The IT66121 is a high-performance and low-power single channel HDMI
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Solomon Goldentek Display GKTW70SDAE4SE 7" WVGA LVDS Display Panel
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
|
|
|
|||
|
|
@ -34,8 +34,8 @@ Example:
|
|||
Use specific request line passing from dma
|
||||
For example, MMC request line is 5
|
||||
|
||||
sdhci: sdhci@98e00000 {
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||||
compatible = "moxa,moxart-sdhci";
|
||||
mmc: mmc@98e00000 {
|
||||
compatible = "moxa,moxart-mmc";
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||||
reg = <0x98e00000 0x5C>;
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||||
interrupts = <5 0>;
|
||||
clocks = <&clk_apb>;
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||||
|
|
|
|||
|
|
@ -48,7 +48,6 @@ required:
|
|||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- intel,vm-map
|
||||
- clocks
|
||||
- resets
|
||||
- "#thermal-sensor-cells"
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson I2C Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
- Beniamino Galvani <b.galvani@gmail.com>
|
||||
|
||||
allOf:
|
||||
|
|
|
|||
|
|
@ -60,6 +60,9 @@ properties:
|
|||
power-domains:
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||||
maxItems: 1
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||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Generic i.MX bus frequency device
|
||||
|
||||
maintainers:
|
||||
- Leonard Crestez <leonard.crestez@nxp.com>
|
||||
- Peng Fan <peng.fan@nxp.com>
|
||||
|
||||
description: |
|
||||
The i.MX SoC family has multiple buses for which clock frequency (and
|
||||
|
|
|
|||
|
|
@ -96,7 +96,7 @@ properties:
|
|||
Documentation/devicetree/bindings/arm/cpus.yaml).
|
||||
|
||||
required:
|
||||
- fiq-index
|
||||
- apple,fiq-index
|
||||
- cpus
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson Message-Handling-Unit Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The Amlogic's Meson SoCs Message-Handling-Unit (MHU) is a mailbox controller
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic GE2D Acceleration Unit
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Video Decoder
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
- Maxime Jourdan <mjourdan@baylibre.com>
|
||||
|
||||
description: |
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson AO-CEC Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The Amlogic Meson AO-CEC module is present is Amlogic SoCs and its purpose is
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: i.MX8M DDR Controller
|
||||
|
||||
maintainers:
|
||||
- Leonard Crestez <leonard.crestez@nxp.com>
|
||||
- Peng Fan <peng.fan@nxp.com>
|
||||
|
||||
description:
|
||||
The DDRC block is integrated in i.MX8M for interfacing with DDR based
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Khadas on-board Microcontroller Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
Khadas embeds a microcontroller on their VIM and Edge boards adding some
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson DWMAC Ethernet controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
- Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
|
||||
# We need a select here so we don't match all nodes with 'snps,dwmac'
|
||||
|
|
|
|||
|
|
@ -40,6 +40,7 @@ properties:
|
|||
patternProperties:
|
||||
'^opp-?[0-9]+$':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
opp-hz: true
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@ properties:
|
|||
patternProperties:
|
||||
'^opp-?[0-9]+$':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
opp-level: true
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic AXG MIPI D-PHY
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic G12A USB2 PHY
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic G12A USB3 + PCIE Combo PHY
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,6 @@ title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS)
|
|||
Low Power Island (LPI) TLMM block
|
||||
|
||||
maintainers:
|
||||
- Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
|
||||
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
|
||||
description: |
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Qualcomm Technologies, Inc. SC7280 TLMM block
|
||||
|
||||
maintainers:
|
||||
- Rajendra Nayak <rnayak@codeaurora.org>
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
|
||||
description: |
|
||||
This binding describes the Top Level Mode Multiplexer block found in the
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Amlogic Meson Everything-Else Power Domains
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |+
|
||||
The Everything-Else Power Domains node should be the child of a syscon
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Qualcomm RPM/RPMh Power domains
|
||||
|
||||
maintainers:
|
||||
- Rajendra Nayak <rnayak@codeaurora.org>
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
|
||||
description:
|
||||
For RPM/RPMh Power domains, we communicate a performance state to RPM/RPMh
|
||||
|
|
|
|||
|
|
@ -35,6 +35,7 @@ patternProperties:
|
|||
description: List of regulators and its properties
|
||||
type: object
|
||||
$ref: regulator.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
qcom,ocp-max-retries:
|
||||
|
|
@ -100,8 +101,6 @@ patternProperties:
|
|||
SAW controlled gang leader. Will be configured as SAW regulator.
|
||||
type: boolean
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson SoC Reset Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -17,9 +17,6 @@ description:
|
|||
acts as directory-based coherency manager.
|
||||
All the properties in ePAPR/DeviceTree specification applies for this platform.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/cache-controller.yaml#
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -33,11 +30,16 @@ select:
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- sifive,fu540-c000-ccache
|
||||
- sifive,fu740-c000-ccache
|
||||
- const: cache
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- sifive,fu540-c000-ccache
|
||||
- sifive,fu740-c000-ccache
|
||||
- const: cache
|
||||
- items:
|
||||
- const: microchip,mpfs-ccache
|
||||
- const: sifive,fu540-c000-ccache
|
||||
- const: cache
|
||||
|
||||
cache-block-size:
|
||||
const: 64
|
||||
|
|
@ -72,29 +74,46 @@ properties:
|
|||
The reference to the reserved-memory for the L2 Loosely Integrated Memory region.
|
||||
The reserved memory node should be defined as per the bindings in reserved-memory.txt.
|
||||
|
||||
if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: sifive,fu540-c000-ccache
|
||||
allOf:
|
||||
- $ref: /schemas/cache-controller.yaml#
|
||||
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
description: |
|
||||
Must contain entries for DirError, DataError and DataFail signals.
|
||||
maxItems: 3
|
||||
cache-sets:
|
||||
const: 1024
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- sifive,fu740-c000-ccache
|
||||
- microchip,mpfs-ccache
|
||||
|
||||
else:
|
||||
properties:
|
||||
interrupts:
|
||||
description: |
|
||||
Must contain entries for DirError, DataError, DataFail, DirFail signals.
|
||||
minItems: 4
|
||||
cache-sets:
|
||||
const: 2048
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
description: |
|
||||
Must contain entries for DirError, DataError, DataFail, DirFail signals.
|
||||
minItems: 4
|
||||
|
||||
else:
|
||||
properties:
|
||||
interrupts:
|
||||
description: |
|
||||
Must contain entries for DirError, DataError and DataFail signals.
|
||||
maxItems: 3
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: sifive,fu740-c000-ccache
|
||||
|
||||
then:
|
||||
properties:
|
||||
cache-sets:
|
||||
const: 2048
|
||||
|
||||
else:
|
||||
properties:
|
||||
cache-sets:
|
||||
const: 1024
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson Random number generator
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson SoC UART Serial Interface
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The Amlogic Meson SoC UART Serial Interface is present on a large range
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Canvas Video Lookup Table
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
- Maxime Jourdan <mjourdan@baylibre.com>
|
||||
|
||||
description: |
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson SPI Communication Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: "spi-controller.yaml#"
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson SPI Flash Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: "spi-controller.yaml#"
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson G12A DWC3 USB SoC Controller Glue
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Meson GXBB SoCs Watchdog timer
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: watchdog.yaml#
|
||||
|
|
|
|||
|
|
@ -64,7 +64,7 @@ correct address for this module, you could get in big trouble (read:
|
|||
crashes, data corruption, etc.). Try this only as a last resort (try BIOS
|
||||
updates first, for example), and backup first! An even more dangerous
|
||||
option is 'force_addr=<IOPORT>'. This will not only enable the PIIX4 like
|
||||
'force' foes, but it will also set a new base I/O port address. The SMBus
|
||||
'force' does, but it will also set a new base I/O port address. The SMBus
|
||||
parts of the PIIX4 needs a range of 8 of these addresses to function
|
||||
correctly. If these addresses are already reserved by some other device,
|
||||
you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY SURE
|
||||
|
|
@ -86,15 +86,15 @@ If you own Force CPCI735 motherboard or other OSB4 based systems you may need
|
|||
to change the SMBus Interrupt Select register so the SMBus controller uses
|
||||
the SMI mode.
|
||||
|
||||
1) Use lspci command and locate the PCI device with the SMBus controller:
|
||||
1) Use ``lspci`` command and locate the PCI device with the SMBus controller:
|
||||
00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f)
|
||||
The line may vary for different chipsets. Please consult the driver source
|
||||
for all possible PCI ids (and lspci -n to match them). Lets assume the
|
||||
for all possible PCI ids (and ``lspci -n`` to match them). Let's assume the
|
||||
device is located at 00:0f.0.
|
||||
2) Now you just need to change the value in 0xD2 register. Get it first with
|
||||
command: lspci -xxx -s 00:0f.0
|
||||
command: ``lspci -xxx -s 00:0f.0``
|
||||
If the value is 0x3 then you need to change it to 0x1:
|
||||
setpci -s 00:0f.0 d2.b=1
|
||||
``setpci -s 00:0f.0 d2.b=1``
|
||||
|
||||
Please note that you don't need to do that in all cases, just when the SMBus is
|
||||
not working properly.
|
||||
|
|
@ -109,6 +109,3 @@ which can easily get corrupted due to a state machine bug. These are mostly
|
|||
Thinkpad laptops, but desktop systems may also be affected. We have no list
|
||||
of all affected systems, so the only safe solution was to prevent access to
|
||||
the SMBus on all IBM systems (detected using DMI data.)
|
||||
|
||||
For additional information, read:
|
||||
http://www.lm-sensors.org/browser/lm-sensors/trunk/README
|
||||
|
|
|
|||
|
|
@ -148,7 +148,7 @@ You can do plain I2C transactions by using read(2) and write(2) calls.
|
|||
You do not need to pass the address byte; instead, set it through
|
||||
ioctl I2C_SLAVE before you try to access the device.
|
||||
|
||||
You can do SMBus level transactions (see documentation file smbus-protocol
|
||||
You can do SMBus level transactions (see documentation file smbus-protocol.rst
|
||||
for details) through the following functions::
|
||||
|
||||
__s32 i2c_smbus_write_quick(int file, __u8 value);
|
||||
|
|
|
|||
|
|
@ -5,6 +5,8 @@ I2C muxes and complex topologies
|
|||
There are a couple of reasons for building more complex I2C topologies
|
||||
than a straight-forward I2C bus with one adapter and one or more devices.
|
||||
|
||||
Some example use cases are:
|
||||
|
||||
1. A mux may be needed on the bus to prevent address collisions.
|
||||
|
||||
2. The bus may be accessible from some external bus master, and arbitration
|
||||
|
|
@ -14,10 +16,10 @@ than a straight-forward I2C bus with one adapter and one or more devices.
|
|||
from the I2C bus, at least most of the time, and sits behind a gate
|
||||
that has to be operated before the device can be accessed.
|
||||
|
||||
Etc
|
||||
===
|
||||
Several types of hardware components such as I2C muxes, I2C gates and I2C
|
||||
arbitrators allow to handle such needs.
|
||||
|
||||
These constructs are represented as I2C adapter trees by Linux, where
|
||||
These components are represented as I2C adapter trees by Linux, where
|
||||
each adapter has a parent adapter (except the root adapter) and zero or
|
||||
more child adapters. The root adapter is the actual adapter that issues
|
||||
I2C transfers, and all adapters with a parent are part of an "i2c-mux"
|
||||
|
|
@ -35,46 +37,7 @@ Locking
|
|||
=======
|
||||
|
||||
There are two variants of locking available to I2C muxes, they can be
|
||||
mux-locked or parent-locked muxes. As is evident from below, it can be
|
||||
useful to know if a mux is mux-locked or if it is parent-locked. The
|
||||
following list was correct at the time of writing:
|
||||
|
||||
In drivers/i2c/muxes/:
|
||||
|
||||
====================== =============================================
|
||||
i2c-arb-gpio-challenge Parent-locked
|
||||
i2c-mux-gpio Normally parent-locked, mux-locked iff
|
||||
all involved gpio pins are controlled by the
|
||||
same I2C root adapter that they mux.
|
||||
i2c-mux-gpmux Normally parent-locked, mux-locked iff
|
||||
specified in device-tree.
|
||||
i2c-mux-ltc4306 Mux-locked
|
||||
i2c-mux-mlxcpld Parent-locked
|
||||
i2c-mux-pca9541 Parent-locked
|
||||
i2c-mux-pca954x Parent-locked
|
||||
i2c-mux-pinctrl Normally parent-locked, mux-locked iff
|
||||
all involved pinctrl devices are controlled
|
||||
by the same I2C root adapter that they mux.
|
||||
i2c-mux-reg Parent-locked
|
||||
====================== =============================================
|
||||
|
||||
In drivers/iio/:
|
||||
|
||||
====================== =============================================
|
||||
gyro/mpu3050 Mux-locked
|
||||
imu/inv_mpu6050/ Mux-locked
|
||||
====================== =============================================
|
||||
|
||||
In drivers/media/:
|
||||
|
||||
======================= =============================================
|
||||
dvb-frontends/lgdt3306a Mux-locked
|
||||
dvb-frontends/m88ds3103 Parent-locked
|
||||
dvb-frontends/rtl2830 Parent-locked
|
||||
dvb-frontends/rtl2832 Mux-locked
|
||||
dvb-frontends/si2168 Mux-locked
|
||||
usb/cx231xx/ Parent-locked
|
||||
======================= =============================================
|
||||
mux-locked or parent-locked muxes.
|
||||
|
||||
|
||||
Mux-locked muxes
|
||||
|
|
@ -89,40 +52,8 @@ full transaction, unrelated I2C transfers may interleave the different
|
|||
stages of the transaction. This has the benefit that the mux driver
|
||||
may be easier and cleaner to implement, but it has some caveats.
|
||||
|
||||
==== =====================================================================
|
||||
ML1. If you build a topology with a mux-locked mux being the parent
|
||||
of a parent-locked mux, this might break the expectation from the
|
||||
parent-locked mux that the root adapter is locked during the
|
||||
transaction.
|
||||
|
||||
ML2. It is not safe to build arbitrary topologies with two (or more)
|
||||
mux-locked muxes that are not siblings, when there are address
|
||||
collisions between the devices on the child adapters of these
|
||||
non-sibling muxes.
|
||||
|
||||
I.e. the select-transfer-deselect transaction targeting e.g. device
|
||||
address 0x42 behind mux-one may be interleaved with a similar
|
||||
operation targeting device address 0x42 behind mux-two. The
|
||||
intension with such a topology would in this hypothetical example
|
||||
be that mux-one and mux-two should not be selected simultaneously,
|
||||
but mux-locked muxes do not guarantee that in all topologies.
|
||||
|
||||
ML3. A mux-locked mux cannot be used by a driver for auto-closing
|
||||
gates/muxes, i.e. something that closes automatically after a given
|
||||
number (one, in most cases) of I2C transfers. Unrelated I2C transfers
|
||||
may creep in and close prematurely.
|
||||
|
||||
ML4. If any non-I2C operation in the mux driver changes the I2C mux state,
|
||||
the driver has to lock the root adapter during that operation.
|
||||
Otherwise garbage may appear on the bus as seen from devices
|
||||
behind the mux, when an unrelated I2C transfer is in flight during
|
||||
the non-I2C mux-changing operation.
|
||||
==== =====================================================================
|
||||
|
||||
|
||||
Mux-locked Example
|
||||
------------------
|
||||
|
||||
~~~~~~~~~~~~~~~~~~
|
||||
|
||||
::
|
||||
|
||||
|
|
@ -153,6 +84,43 @@ This means that accesses to D2 are lockout out for the full duration
|
|||
of the entire operation. But accesses to D3 are possibly interleaved
|
||||
at any point.
|
||||
|
||||
Mux-locked caveats
|
||||
~~~~~~~~~~~~~~~~~~
|
||||
|
||||
When using a mux-locked mux, be aware of the following restrictions:
|
||||
|
||||
[ML1]
|
||||
If you build a topology with a mux-locked mux being the parent
|
||||
of a parent-locked mux, this might break the expectation from the
|
||||
parent-locked mux that the root adapter is locked during the
|
||||
transaction.
|
||||
|
||||
[ML2]
|
||||
It is not safe to build arbitrary topologies with two (or more)
|
||||
mux-locked muxes that are not siblings, when there are address
|
||||
collisions between the devices on the child adapters of these
|
||||
non-sibling muxes.
|
||||
|
||||
I.e. the select-transfer-deselect transaction targeting e.g. device
|
||||
address 0x42 behind mux-one may be interleaved with a similar
|
||||
operation targeting device address 0x42 behind mux-two. The
|
||||
intent with such a topology would in this hypothetical example
|
||||
be that mux-one and mux-two should not be selected simultaneously,
|
||||
but mux-locked muxes do not guarantee that in all topologies.
|
||||
|
||||
[ML3]
|
||||
A mux-locked mux cannot be used by a driver for auto-closing
|
||||
gates/muxes, i.e. something that closes automatically after a given
|
||||
number (one, in most cases) of I2C transfers. Unrelated I2C transfers
|
||||
may creep in and close prematurely.
|
||||
|
||||
[ML4]
|
||||
If any non-I2C operation in the mux driver changes the I2C mux state,
|
||||
the driver has to lock the root adapter during that operation.
|
||||
Otherwise garbage may appear on the bus as seen from devices
|
||||
behind the mux, when an unrelated I2C transfer is in flight during
|
||||
the non-I2C mux-changing operation.
|
||||
|
||||
|
||||
Parent-locked muxes
|
||||
-------------------
|
||||
|
|
@ -161,28 +129,10 @@ Parent-locked muxes lock the parent adapter during the full select-
|
|||
transfer-deselect transaction. The implication is that the mux driver
|
||||
has to ensure that any and all I2C transfers through that parent
|
||||
adapter during the transaction are unlocked I2C transfers (using e.g.
|
||||
__i2c_transfer), or a deadlock will follow. There are a couple of
|
||||
caveats.
|
||||
|
||||
==== ====================================================================
|
||||
PL1. If you build a topology with a parent-locked mux being the child
|
||||
of another mux, this might break a possible assumption from the
|
||||
child mux that the root adapter is unused between its select op
|
||||
and the actual transfer (e.g. if the child mux is auto-closing
|
||||
and the parent mux issues I2C transfers as part of its select).
|
||||
This is especially the case if the parent mux is mux-locked, but
|
||||
it may also happen if the parent mux is parent-locked.
|
||||
|
||||
PL2. If select/deselect calls out to other subsystems such as gpio,
|
||||
pinctrl, regmap or iio, it is essential that any I2C transfers
|
||||
caused by these subsystems are unlocked. This can be convoluted to
|
||||
accomplish, maybe even impossible if an acceptably clean solution
|
||||
is sought.
|
||||
==== ====================================================================
|
||||
|
||||
__i2c_transfer), or a deadlock will follow.
|
||||
|
||||
Parent-locked Example
|
||||
---------------------
|
||||
~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
::
|
||||
|
||||
|
|
@ -212,10 +162,30 @@ When there is an access to D1, this happens:
|
|||
9. M1 unlocks its parent adapter.
|
||||
10. M1 unlocks muxes on its parent.
|
||||
|
||||
|
||||
This means that accesses to both D2 and D3 are locked out for the full
|
||||
duration of the entire operation.
|
||||
|
||||
Parent-locked Caveats
|
||||
~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
When using a parent-locked mux, be aware of the following restrictions:
|
||||
|
||||
[PL1]
|
||||
If you build a topology with a parent-locked mux being the child
|
||||
of another mux, this might break a possible assumption from the
|
||||
child mux that the root adapter is unused between its select op
|
||||
and the actual transfer (e.g. if the child mux is auto-closing
|
||||
and the parent mux issues I2C transfers as part of its select).
|
||||
This is especially the case if the parent mux is mux-locked, but
|
||||
it may also happen if the parent mux is parent-locked.
|
||||
|
||||
[PL2]
|
||||
If select/deselect calls out to other subsystems such as gpio,
|
||||
pinctrl, regmap or iio, it is essential that any I2C transfers
|
||||
caused by these subsystems are unlocked. This can be convoluted to
|
||||
accomplish, maybe even impossible if an acceptably clean solution
|
||||
is sought.
|
||||
|
||||
|
||||
Complex Examples
|
||||
================
|
||||
|
|
@ -261,8 +231,10 @@ This is a good topology::
|
|||
When device D1 is accessed, accesses to D2 are locked out for the
|
||||
full duration of the operation (muxes on the top child adapter of M1
|
||||
are locked). But accesses to D3 and D4 are possibly interleaved at
|
||||
any point. Accesses to D3 locks out D1 and D2, but accesses to D4
|
||||
are still possibly interleaved.
|
||||
any point.
|
||||
|
||||
Accesses to D3 locks out D1 and D2, but accesses to D4 are still possibly
|
||||
interleaved.
|
||||
|
||||
|
||||
Mux-locked mux as parent of parent-locked mux
|
||||
|
|
@ -394,3 +366,47 @@ This is a good topology::
|
|||
When D1 or D2 are accessed, accesses to D3 and D4 are locked out while
|
||||
accesses to D5 may interleave. When D3 or D4 are accessed, accesses to
|
||||
all other devices are locked out.
|
||||
|
||||
|
||||
Mux type of existing device drivers
|
||||
===================================
|
||||
|
||||
Whether a device is mux-locked or parent-locked depends on its
|
||||
implementation. The following list was correct at the time of writing:
|
||||
|
||||
In drivers/i2c/muxes/:
|
||||
|
||||
====================== =============================================
|
||||
i2c-arb-gpio-challenge Parent-locked
|
||||
i2c-mux-gpio Normally parent-locked, mux-locked iff
|
||||
all involved gpio pins are controlled by the
|
||||
same I2C root adapter that they mux.
|
||||
i2c-mux-gpmux Normally parent-locked, mux-locked iff
|
||||
specified in device-tree.
|
||||
i2c-mux-ltc4306 Mux-locked
|
||||
i2c-mux-mlxcpld Parent-locked
|
||||
i2c-mux-pca9541 Parent-locked
|
||||
i2c-mux-pca954x Parent-locked
|
||||
i2c-mux-pinctrl Normally parent-locked, mux-locked iff
|
||||
all involved pinctrl devices are controlled
|
||||
by the same I2C root adapter that they mux.
|
||||
i2c-mux-reg Parent-locked
|
||||
====================== =============================================
|
||||
|
||||
In drivers/iio/:
|
||||
|
||||
====================== =============================================
|
||||
gyro/mpu3050 Mux-locked
|
||||
imu/inv_mpu6050/ Mux-locked
|
||||
====================== =============================================
|
||||
|
||||
In drivers/media/:
|
||||
|
||||
======================= =============================================
|
||||
dvb-frontends/lgdt3306a Mux-locked
|
||||
dvb-frontends/m88ds3103 Parent-locked
|
||||
dvb-frontends/rtl2830 Parent-locked
|
||||
dvb-frontends/rtl2832 Mux-locked
|
||||
dvb-frontends/si2168 Mux-locked
|
||||
usb/cx231xx/ Parent-locked
|
||||
======================= =============================================
|
||||
|
|
|
|||
|
|
@ -32,9 +32,9 @@ User manual
|
|||
===========
|
||||
|
||||
I2C slave backends behave like standard I2C clients. So, you can instantiate
|
||||
them as described in the document 'instantiating-devices'. The only difference
|
||||
is that i2c slave backends have their own address space. So, you have to add
|
||||
0x1000 to the address you would originally request. An example for
|
||||
them as described in the document instantiating-devices.rst. The only
|
||||
difference is that i2c slave backends have their own address space. So, you
|
||||
have to add 0x1000 to the address you would originally request. An example for
|
||||
instantiating the slave-eeprom driver from userspace at the 7 bit address 0x64
|
||||
on bus 1::
|
||||
|
||||
|
|
|
|||
|
|
@ -364,7 +364,7 @@ stop condition is issued between transaction. The i2c_msg structure
|
|||
contains for each message the client address, the number of bytes of the
|
||||
message and the message data itself.
|
||||
|
||||
You can read the file ``i2c-protocol`` for more information about the
|
||||
You can read the file i2c-protocol.rst for more information about the
|
||||
actual I2C protocol.
|
||||
|
||||
|
||||
|
|
@ -414,7 +414,7 @@ transactions return 0 on success; the 'read' transactions return the read
|
|||
value, except for block transactions, which return the number of values
|
||||
read. The block buffers need not be longer than 32 bytes.
|
||||
|
||||
You can read the file ``smbus-protocol`` for more information about the
|
||||
You can read the file smbus-protocol.rst for more information about the
|
||||
actual SMBus protocol.
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -47,7 +47,6 @@ allow_join_initial_addr_port - BOOLEAN
|
|||
Default: 1
|
||||
|
||||
pm_type - INTEGER
|
||||
|
||||
Set the default path manager type to use for each new MPTCP
|
||||
socket. In-kernel path management will control subflow
|
||||
connections and address advertisements according to
|
||||
|
|
|
|||
|
|
@ -70,15 +70,6 @@ nf_conntrack_generic_timeout - INTEGER (seconds)
|
|||
Default for generic timeout. This refers to layer 4 unknown/unsupported
|
||||
protocols.
|
||||
|
||||
nf_conntrack_helper - BOOLEAN
|
||||
- 0 - disabled (default)
|
||||
- not 0 - enabled
|
||||
|
||||
Enable automatic conntrack helper assignment.
|
||||
If disabled it is required to set up iptables rules to assign
|
||||
helpers to connections. See the CT target description in the
|
||||
iptables-extensions(8) man page for further information.
|
||||
|
||||
nf_conntrack_icmp_timeout - INTEGER (seconds)
|
||||
default 30
|
||||
|
||||
|
|
|
|||
|
|
@ -1055,17 +1055,6 @@ The kernel interface functions are as follows:
|
|||
first function to change. Note that this must be called in TASK_RUNNING
|
||||
state.
|
||||
|
||||
(#) Get reply timestamp::
|
||||
|
||||
bool rxrpc_kernel_get_reply_time(struct socket *sock,
|
||||
struct rxrpc_call *call,
|
||||
ktime_t *_ts)
|
||||
|
||||
This allows the timestamp on the first DATA packet of the reply of a
|
||||
client call to be queried, provided that it is still in the Rx ring. If
|
||||
successful, the timestamp will be stored into ``*_ts`` and true will be
|
||||
returned; false will be returned otherwise.
|
||||
|
||||
(#) Get remote client epoch::
|
||||
|
||||
u32 rxrpc_kernel_get_epoch(struct socket *sock,
|
||||
|
|
|
|||
63
MAINTAINERS
63
MAINTAINERS
|
|
@ -671,7 +671,8 @@ F: fs/afs/
|
|||
F: include/trace/events/afs.h
|
||||
|
||||
AGPGART DRIVER
|
||||
M: David Airlie <airlied@linux.ie>
|
||||
M: David Airlie <airlied@redhat.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Maintained
|
||||
T: git git://anongit.freedesktop.org/drm/drm
|
||||
F: drivers/char/agp/
|
||||
|
|
@ -1010,7 +1011,6 @@ F: drivers/spi/spi-amd.c
|
|||
|
||||
AMD MP2 I2C DRIVER
|
||||
M: Elie Morisse <syniurge@gmail.com>
|
||||
M: Nehal Shah <nehal-bakulchandra.shah@amd.com>
|
||||
M: Shyam Sundar S K <shyam-sundar.s-k@amd.com>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -1803,7 +1803,7 @@ N: sun[x456789]i
|
|||
N: sun50i
|
||||
|
||||
ARM/Amlogic Meson SoC CLOCK FRAMEWORK
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
M: Jerome Brunet <jbrunet@baylibre.com>
|
||||
L: linux-amlogic@lists.infradead.org
|
||||
S: Maintained
|
||||
|
|
@ -1828,7 +1828,7 @@ F: Documentation/devicetree/bindings/sound/amlogic*
|
|||
F: sound/soc/meson/
|
||||
|
||||
ARM/Amlogic Meson SoC support
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
M: Kevin Hilman <khilman@baylibre.com>
|
||||
R: Jerome Brunet <jbrunet@baylibre.com>
|
||||
R: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
|
|
@ -2531,7 +2531,7 @@ W: http://www.digriz.org.uk/ts78xx/kernel
|
|||
F: arch/arm/mach-orion5x/ts78xx-*
|
||||
|
||||
ARM/OXNAS platform support
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-oxnas@groups.io (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
|
@ -2579,7 +2579,7 @@ W: http://www.armlinux.org.uk/
|
|||
|
||||
ARM/QUALCOMM SUPPORT
|
||||
M: Andy Gross <agross@kernel.org>
|
||||
M: Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
M: Bjorn Andersson <andersson@kernel.org>
|
||||
R: Konrad Dybcio <konrad.dybcio@somainline.org>
|
||||
L: linux-arm-msm@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -5245,6 +5245,7 @@ F: block/blk-throttle.c
|
|||
F: include/linux/blk-cgroup.h
|
||||
|
||||
CONTROL GROUP - CPUSET
|
||||
M: Waiman Long <longman@redhat.com>
|
||||
M: Zefan Li <lizefan.x@bytedance.com>
|
||||
L: cgroups@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -6753,7 +6754,7 @@ F: Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml
|
|||
F: drivers/gpu/drm/panel/panel-widechips-ws2401.c
|
||||
|
||||
DRM DRIVERS
|
||||
M: David Airlie <airlied@linux.ie>
|
||||
M: David Airlie <airlied@gmail.com>
|
||||
M: Daniel Vetter <daniel@ffwll.ch>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Maintained
|
||||
|
|
@ -6792,7 +6793,7 @@ F: Documentation/devicetree/bindings/display/allwinner*
|
|||
F: drivers/gpu/drm/sun4i/
|
||||
|
||||
DRM DRIVERS FOR AMLOGIC SOCS
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
L: linux-amlogic@lists.infradead.org
|
||||
S: Supported
|
||||
|
|
@ -6814,7 +6815,7 @@ F: drivers/gpu/drm/atmel-hlcdc/
|
|||
|
||||
DRM DRIVERS FOR BRIDGE CHIPS
|
||||
M: Andrzej Hajda <andrzej.hajda@intel.com>
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
M: Robert Foss <robert.foss@linaro.org>
|
||||
R: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
|
||||
R: Jonas Karlman <jonas@kwiboo.se>
|
||||
|
|
@ -8652,8 +8653,8 @@ F: drivers/input/touchscreen/goodix*
|
|||
|
||||
GOOGLE ETHERNET DRIVERS
|
||||
M: Jeroen de Borst <jeroendb@google.com>
|
||||
R: Catherine Sullivan <csully@google.com>
|
||||
R: David Awogbemila <awogbemila@google.com>
|
||||
M: Catherine Sullivan <csully@google.com>
|
||||
R: Shailend Chand <shailend@google.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/networking/device_drivers/ethernet/google/gve.rst
|
||||
|
|
@ -8943,7 +8944,7 @@ F: include/linux/hw_random.h
|
|||
|
||||
HARDWARE SPINLOCK CORE
|
||||
M: Ohad Ben-Cohen <ohad@wizery.com>
|
||||
M: Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
M: Bjorn Andersson <andersson@kernel.org>
|
||||
R: Baolin Wang <baolin.wang7@gmail.com>
|
||||
L: linux-remoteproc@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -9122,7 +9123,7 @@ S: Maintained
|
|||
F: drivers/dma/hisi_dma.c
|
||||
|
||||
HISILICON GPIO DRIVER
|
||||
M: Luo Jiaxing <luojiaxing@huawei.com>
|
||||
M: Jay Fang <f.fangjian@huawei.com>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/gpio/gpio-hisi.c
|
||||
|
|
@ -9208,8 +9209,8 @@ F: Documentation/ABI/testing/debugfs-hisi-zip
|
|||
F: drivers/crypto/hisilicon/zip/
|
||||
|
||||
HISILICON ROCE DRIVER
|
||||
M: Haoyue Xu <xuhaoyue1@hisilicon.com>
|
||||
M: Wenpeng Liang <liangwenpeng@huawei.com>
|
||||
M: Weihang Li <liweihang@huawei.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/infiniband/hisilicon-hns-roce.txt
|
||||
|
|
@ -10835,7 +10836,7 @@ F: drivers/media/tuners/it913x*
|
|||
|
||||
ITE IT66121 HDMI BRIDGE DRIVER
|
||||
M: Phong LE <ple@baylibre.com>
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
S: Maintained
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
F: Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml
|
||||
|
|
@ -11354,7 +11355,7 @@ F: kernel/debug/
|
|||
F: kernel/module/kdb.c
|
||||
|
||||
KHADAS MCU MFD DRIVER
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
L: linux-amlogic@lists.infradead.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/mfd/khadas,mcu.yaml
|
||||
|
|
@ -13225,7 +13226,7 @@ S: Maintained
|
|||
F: drivers/watchdog/menz69_wdt.c
|
||||
|
||||
MESON AO CEC DRIVER FOR AMLOGIC SOCS
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
L: linux-amlogic@lists.infradead.org
|
||||
S: Supported
|
||||
|
|
@ -13236,7 +13237,7 @@ F: drivers/media/cec/platform/meson/ao-cec-g12a.c
|
|||
F: drivers/media/cec/platform/meson/ao-cec.c
|
||||
|
||||
MESON GE2D DRIVER FOR AMLOGIC SOCS
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
L: linux-amlogic@lists.infradead.org
|
||||
S: Supported
|
||||
|
|
@ -13252,7 +13253,7 @@ F: Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
|
|||
F: drivers/mtd/nand/raw/meson_*
|
||||
|
||||
MESON VIDEO DECODER DRIVER FOR AMLOGIC SOCS
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
L: linux-amlogic@lists.infradead.org
|
||||
S: Supported
|
||||
|
|
@ -16132,7 +16133,7 @@ F: drivers/gpio/gpio-sama5d2-piobu.c
|
|||
F: drivers/pinctrl/pinctrl-at91*
|
||||
|
||||
PIN CONTROLLER - QUALCOMM
|
||||
M: Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
M: Bjorn Andersson <andersson@kernel.org>
|
||||
L: linux-arm-msm@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/pinctrl/qcom,*.txt
|
||||
|
|
@ -16825,7 +16826,7 @@ F: Documentation/devicetree/bindings/media/*camss*
|
|||
F: drivers/media/platform/qcom/camss/
|
||||
|
||||
QUALCOMM CLOCK DRIVERS
|
||||
M: Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
M: Bjorn Andersson <andersson@kernel.org>
|
||||
L: linux-arm-msm@vger.kernel.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git
|
||||
|
|
@ -16864,6 +16865,7 @@ F: drivers/net/ethernet/qualcomm/emac/
|
|||
|
||||
QUALCOMM ETHQOS ETHERNET DRIVER
|
||||
M: Vinod Koul <vkoul@kernel.org>
|
||||
R: Bhupesh Sharma <bhupesh.sharma@linaro.org>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/qcom,ethqos.txt
|
||||
|
|
@ -17314,7 +17316,7 @@ S: Supported
|
|||
F: fs/reiserfs/
|
||||
|
||||
REMOTE PROCESSOR (REMOTEPROC) SUBSYSTEM
|
||||
M: Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
M: Bjorn Andersson <andersson@kernel.org>
|
||||
M: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
L: linux-remoteproc@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -17327,7 +17329,7 @@ F: include/linux/remoteproc.h
|
|||
F: include/linux/remoteproc/
|
||||
|
||||
REMOTE PROCESSOR MESSAGING (RPMSG) SUBSYSTEM
|
||||
M: Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
M: Bjorn Andersson <andersson@kernel.org>
|
||||
M: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
L: linux-remoteproc@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -17752,6 +17754,17 @@ L: linux-rdma@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/infiniband/ulp/rtrs/
|
||||
|
||||
RUNTIME VERIFICATION (RV)
|
||||
M: Daniel Bristot de Oliveira <bristot@kernel.org>
|
||||
M: Steven Rostedt <rostedt@goodmis.org>
|
||||
L: linux-trace-devel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/trace/rv/
|
||||
F: include/linux/rv.h
|
||||
F: include/rv/
|
||||
F: kernel/trace/rv/
|
||||
F: tools/verification/
|
||||
|
||||
RXRPC SOCKETS (AF_RXRPC)
|
||||
M: David Howells <dhowells@redhat.com>
|
||||
M: Marc Dionne <marc.dionne@auristor.com>
|
||||
|
|
@ -19955,6 +19968,7 @@ S: Supported
|
|||
F: drivers/net/team/
|
||||
F: include/linux/if_team.h
|
||||
F: include/uapi/linux/if_team.h
|
||||
F: tools/testing/selftests/net/team/
|
||||
|
||||
TECHNOLOGIC SYSTEMS TS-5500 PLATFORM SUPPORT
|
||||
M: "Savoir-faire Linux Inc." <kernel@savoirfairelinux.com>
|
||||
|
|
@ -20618,6 +20632,7 @@ F: include/*/ftrace.h
|
|||
F: include/linux/trace*.h
|
||||
F: include/trace/
|
||||
F: kernel/trace/
|
||||
F: scripts/tracing/
|
||||
F: tools/testing/selftests/ftrace/
|
||||
|
||||
TRACING MMIO ACCESSES (MMIOTRACE)
|
||||
|
|
@ -21560,7 +21575,7 @@ F: drivers/gpio/gpio-virtio.c
|
|||
F: include/uapi/linux/virtio_gpio.h
|
||||
|
||||
VIRTIO GPU DRIVER
|
||||
M: David Airlie <airlied@linux.ie>
|
||||
M: David Airlie <airlied@redhat.com>
|
||||
M: Gerd Hoffmann <kraxel@redhat.com>
|
||||
R: Gurchetan Singh <gurchetansingh@chromium.org>
|
||||
R: Chia-I Wu <olvaffe@gmail.com>
|
||||
|
|
|
|||
5
Makefile
5
Makefile
|
|
@ -2,7 +2,7 @@
|
|||
VERSION = 6
|
||||
PATCHLEVEL = 0
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Hurr durr I'ma ninja sloth
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
@ -1155,8 +1155,7 @@ headers_install: headers
|
|||
|
||||
headers:
|
||||
ifeq ($(KBUILD_EXTMOD),)
|
||||
$(if $(wildcard $(srctree)/arch/$(SRCARCH)/include/uapi/asm/Kbuild),, \
|
||||
$(error Headers not exportable for the $(SRCARCH) architecture))
|
||||
$(if $(filter um, $(SRCARCH)), $(error Headers not exportable for UML))
|
||||
endif
|
||||
$(Q)$(MAKE) $(hdr-inst)=$(hdr-prefix)include/uapi
|
||||
$(Q)$(MAKE) $(hdr-inst)=$(hdr-prefix)arch/$(SRCARCH)/include/uapi
|
||||
|
|
|
|||
|
|
@ -923,6 +923,9 @@ config HAVE_SOFTIRQ_ON_OWN_STACK
|
|||
Architecture provides a function to run __do_softirq() on a
|
||||
separate stack.
|
||||
|
||||
config SOFTIRQ_ON_OWN_STACK
|
||||
def_bool HAVE_SOFTIRQ_ON_OWN_STACK && !PREEMPT_RT
|
||||
|
||||
config ALTERNATE_USER_ADDRESS_SPACE
|
||||
bool
|
||||
help
|
||||
|
|
|
|||
|
|
@ -1502,8 +1502,7 @@ SYSC_OMAP2_SOFTRESET |
|
|||
mmc1: mmc@0 {
|
||||
compatible = "ti,am335-sdhci";
|
||||
ti,needs-special-reset;
|
||||
dmas = <&edma_xbar 24 0 0
|
||||
&edma_xbar 25 0 0>;
|
||||
dmas = <&edma 24 0>, <&edma 25 0>;
|
||||
dma-names = "tx", "rx";
|
||||
interrupts = <64>;
|
||||
reg = <0x0 0x1000>;
|
||||
|
|
|
|||
|
|
@ -25,6 +25,10 @@ &usb3_tm {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb4_tm {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&atl_tm {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -249,6 +249,7 @@ display@1000000 {
|
|||
/* 640x480 16bpp @ 25.175MHz is 36827428 bytes/s */
|
||||
max-memory-bandwidth = <40000000>;
|
||||
memory-region = <&impd1_ram>;
|
||||
dma-ranges;
|
||||
|
||||
port@0 {
|
||||
#address-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -160,6 +160,7 @@ pic: pic@14000000 {
|
|||
|
||||
pci: pciv3@62000000 {
|
||||
compatible = "arm,integrator-ap-pci", "v3,v360epc-pci";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
|
|
@ -261,7 +262,7 @@ bus@c0000000 {
|
|||
lm0: bus@c0000000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x00000000 0xc0000000 0x10000000>;
|
||||
dma-ranges = <0x00000000 0x80000000 0x10000000>;
|
||||
dma-ranges = <0x00000000 0xc0000000 0x10000000>;
|
||||
reg = <0xc0000000 0x10000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -269,7 +270,7 @@ lm0: bus@c0000000 {
|
|||
lm1: bus@d0000000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x00000000 0xd0000000 0x10000000>;
|
||||
dma-ranges = <0x00000000 0x80000000 0x10000000>;
|
||||
dma-ranges = <0x00000000 0xd0000000 0x10000000>;
|
||||
reg = <0xd0000000 0x10000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -277,7 +278,7 @@ lm1: bus@d0000000 {
|
|||
lm2: bus@e0000000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x00000000 0xe0000000 0x10000000>;
|
||||
dma-ranges = <0x00000000 0x80000000 0x10000000>;
|
||||
dma-ranges = <0x00000000 0xe0000000 0x10000000>;
|
||||
reg = <0xe0000000 0x10000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -285,7 +286,7 @@ lm2: bus@e0000000 {
|
|||
lm3: bus@f0000000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x00000000 0xf0000000 0x10000000>;
|
||||
dma-ranges = <0x00000000 0x80000000 0x10000000>;
|
||||
dma-ranges = <0x00000000 0xf0000000 0x10000000>;
|
||||
reg = <0xf0000000 0x10000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -541,13 +541,13 @@ mdio1: mdio@e200413c {
|
|||
|
||||
phy0: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -79,7 +79,7 @@ &clk_pll {
|
|||
clocks = <&ref12>;
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
&mmc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -93,8 +93,8 @@ watchdog: watchdog@98500000 {
|
|||
clock-names = "PCLK";
|
||||
};
|
||||
|
||||
sdhci: sdhci@98e00000 {
|
||||
compatible = "moxa,moxart-sdhci";
|
||||
mmc: mmc@98e00000 {
|
||||
compatible = "moxa,moxart-mmc";
|
||||
reg = <0x98e00000 0x5C>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk_apb>;
|
||||
|
|
|
|||
|
|
@ -70,7 +70,7 @@ static void __init init_irq_stacks(void)
|
|||
}
|
||||
}
|
||||
|
||||
#ifndef CONFIG_PREEMPT_RT
|
||||
#ifdef CONFIG_SOFTIRQ_ON_OWN_STACK
|
||||
static void ____do_softirq(void *arg)
|
||||
{
|
||||
__do_softirq();
|
||||
|
|
|
|||
|
|
@ -18,8 +18,8 @@ config SOC_SP7021
|
|||
select ARM_PSCI
|
||||
select PINCTRL
|
||||
select PINCTRL_SPPCTL
|
||||
select SERIAL_SUNPLUS
|
||||
select SERIAL_SUNPLUS_CONSOLE
|
||||
select SERIAL_SUNPLUS if TTY
|
||||
select SERIAL_SUNPLUS_CONSOLE if TTY
|
||||
help
|
||||
Support for Sunplus SP7021 SoC. It is based on ARM 4-core
|
||||
Cortex-A7 with various peripherals (e.g.: I2C, SPI, SDIO,
|
||||
|
|
|
|||
|
|
@ -1887,6 +1887,8 @@ config ARM64_BTI_KERNEL
|
|||
depends on CC_HAS_BRANCH_PROT_PAC_RET_BTI
|
||||
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94697
|
||||
depends on !CC_IS_GCC || GCC_VERSION >= 100100
|
||||
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106671
|
||||
depends on !CC_IS_GCC
|
||||
# https://github.com/llvm/llvm-project/commit/a88c722e687e6780dcd6a58718350dc76fcc4cc9
|
||||
depends on !CC_IS_CLANG || CLANG_VERSION >= 120000
|
||||
depends on (!FUNCTION_GRAPH_TRACER || DYNAMIC_FTRACE_WITH_REGS)
|
||||
|
|
|
|||
|
|
@ -152,11 +152,11 @@ &gpio4 {
|
|||
* CPLD_reset is RESET_SOFT in schematic
|
||||
*/
|
||||
gpio-line-names =
|
||||
"CPLD_D[1]", "CPLD_int", "CPLD_reset", "",
|
||||
"", "CPLD_D[0]", "", "",
|
||||
"", "", "", "CPLD_D[2]",
|
||||
"CPLD_D[3]", "CPLD_D[4]", "CPLD_D[5]", "CPLD_D[6]",
|
||||
"CPLD_D[7]", "", "", "",
|
||||
"CPLD_D[6]", "CPLD_int", "CPLD_reset", "",
|
||||
"", "CPLD_D[7]", "", "",
|
||||
"", "", "", "CPLD_D[5]",
|
||||
"CPLD_D[4]", "CPLD_D[3]", "CPLD_D[2]", "CPLD_D[1]",
|
||||
"CPLD_D[0]", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "KBD_intK",
|
||||
"", "", "", "";
|
||||
|
|
|
|||
|
|
@ -5,7 +5,6 @@
|
|||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
#include "imx8mm-tqma8mqml.dtsi"
|
||||
#include "mba8mx.dtsi"
|
||||
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
* Copyright 2020-2021 TQ-Systems GmbH
|
||||
*/
|
||||
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
#include "imx8mm.dtsi"
|
||||
|
||||
/ {
|
||||
|
|
|
|||
|
|
@ -367,8 +367,8 @@ reg_vdd_arm: BUCK2 {
|
|||
nxp,dvs-standby-voltage = <850000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-min-microvolt = <805000>;
|
||||
regulator-name = "On-module +VDD_ARM (BUCK2)";
|
||||
regulator-ramp-delay = <3125>;
|
||||
};
|
||||
|
|
@ -376,8 +376,8 @@ reg_vdd_arm: BUCK2 {
|
|||
reg_vdd_dram: BUCK3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-min-microvolt = <805000>;
|
||||
regulator-name = "On-module +VDD_GPU_VPU_DDR (BUCK3)";
|
||||
};
|
||||
|
||||
|
|
@ -416,7 +416,7 @@ reg_nvcc_snvs: LDO1 {
|
|||
reg_vdd_snvs: LDO2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-max-microvolt = <800000>;
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-name = "On-module +V0.8_SNVS (LDO2)";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -672,7 +672,6 @@ pgc_gpumix: power-domain@2 {
|
|||
<&clk IMX8MN_CLK_GPU_SHADER>,
|
||||
<&clk IMX8MN_CLK_GPU_BUS_ROOT>,
|
||||
<&clk IMX8MN_CLK_GPU_AHB>;
|
||||
resets = <&src IMX8MQ_RESET_GPU_RESET>;
|
||||
};
|
||||
|
||||
pgc_dispmix: power-domain@3 {
|
||||
|
|
|
|||
|
|
@ -57,13 +57,13 @@ gpio-keys {
|
|||
switch-1 {
|
||||
label = "S12";
|
||||
linux,code = <BTN_0>;
|
||||
gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio5 27 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
switch-2 {
|
||||
label = "S13";
|
||||
linux,code = <BTN_1>;
|
||||
gpios = <&gpio5 27 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -394,6 +394,8 @@ &i2c6 {
|
|||
|
||||
&pcf85063 {
|
||||
/* RTC_EVENT# is connected on MBa8MPxL */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcf85063>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
|
|
@ -630,6 +632,10 @@ pinctrl_lvdsdisplay: lvdsdisplaygrp {
|
|||
fsl,pins = <MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x10>; /* Power enable */
|
||||
};
|
||||
|
||||
pinctrl_pcf85063: pcf85063grp {
|
||||
fsl,pins = <MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x80>;
|
||||
};
|
||||
|
||||
/* LVDS Backlight */
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <MX8MP_IOMUXC_SAI5_RXD0__PWM2_OUT 0x14>;
|
||||
|
|
|
|||
|
|
@ -123,8 +123,7 @@ reg_can2_stby: regulator-can2-stby {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_can>;
|
||||
regulator-name = "can2_stby";
|
||||
gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
|
@ -484,35 +483,40 @@ ports {
|
|||
lan1: port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
phy-mode = "internal";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
lan2: port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
phy-mode = "internal";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
lan3: port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
phy-mode = "internal";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
lan4: port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
phy-mode = "internal";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
lan5: port@4 {
|
||||
reg = <4>;
|
||||
label = "lan5";
|
||||
phy-mode = "internal";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
ethernet = <&fec>;
|
||||
phy-mode = "rgmii-id";
|
||||
|
|
|
|||
|
|
@ -172,6 +172,7 @@ pcc3: clock-controller@292d0000 {
|
|||
compatible = "fsl,imx8ulp-pcc3";
|
||||
reg = <0x292d0000 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
tpm5: tpm@29340000 {
|
||||
|
|
@ -270,6 +271,7 @@ pcc4: clock-controller@29800000 {
|
|||
compatible = "fsl,imx8ulp-pcc4";
|
||||
reg = <0x29800000 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
lpi2c6: i2c@29840000 {
|
||||
|
|
@ -414,6 +416,7 @@ pcc5: clock-controller@2da70000 {
|
|||
compatible = "fsl,imx8ulp-pcc5";
|
||||
reg = <0x2da70000 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -3374,6 +3374,8 @@ usb_1: usb@a6f8800 {
|
|||
<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_USB3_0 0>;
|
||||
interconnect-names = "usb-ddr", "apps-usb";
|
||||
|
||||
wakeup-source;
|
||||
|
||||
usb_1_dwc3: usb@a600000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0 0x0a600000 0 0xe000>;
|
||||
|
|
@ -3384,7 +3386,6 @@ usb_1_dwc3: usb@a600000 {
|
|||
phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
maximum-speed = "super-speed";
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -235,13 +235,13 @@ keyboard@68 {
|
|||
};
|
||||
|
||||
&remoteproc_adsp {
|
||||
firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
|
||||
firmware-name = "qcom/sc8280xp/LENOVO/21BX/qcadsp8280.mbn";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&remoteproc_nsp0 {
|
||||
firmware-name = "qcom/sc8280xp/qccdsp8280.mbn";
|
||||
firmware-name = "qcom/sc8280xp/LENOVO/21BX/qccdsp8280.mbn";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -3394,57 +3394,49 @@ fastrpc {
|
|||
compute-cb@1 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <1>;
|
||||
iommus = <&apps_smmu 0x1401 0x2040>,
|
||||
<&apps_smmu 0x1421 0x0>,
|
||||
<&apps_smmu 0x2001 0x420>,
|
||||
<&apps_smmu 0x2041 0x0>;
|
||||
iommus = <&apps_smmu 0x1001 0x0460>;
|
||||
};
|
||||
|
||||
compute-cb@2 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <2>;
|
||||
iommus = <&apps_smmu 0x2 0x3440>,
|
||||
<&apps_smmu 0x22 0x3400>;
|
||||
iommus = <&apps_smmu 0x1002 0x0460>;
|
||||
};
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
iommus = <&apps_smmu 0x3 0x3440>,
|
||||
<&apps_smmu 0x1423 0x0>,
|
||||
<&apps_smmu 0x2023 0x0>;
|
||||
iommus = <&apps_smmu 0x1003 0x0460>;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
iommus = <&apps_smmu 0x4 0x3440>,
|
||||
<&apps_smmu 0x24 0x3400>;
|
||||
iommus = <&apps_smmu 0x1004 0x0460>;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
iommus = <&apps_smmu 0x5 0x3440>,
|
||||
<&apps_smmu 0x25 0x3400>;
|
||||
iommus = <&apps_smmu 0x1005 0x0460>;
|
||||
};
|
||||
|
||||
compute-cb@6 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <6>;
|
||||
iommus = <&apps_smmu 0x6 0x3460>;
|
||||
iommus = <&apps_smmu 0x1006 0x0460>;
|
||||
};
|
||||
|
||||
compute-cb@7 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <7>;
|
||||
iommus = <&apps_smmu 0x7 0x3460>;
|
||||
iommus = <&apps_smmu 0x1007 0x0460>;
|
||||
};
|
||||
|
||||
compute-cb@8 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <8>;
|
||||
iommus = <&apps_smmu 0x8 0x3460>;
|
||||
iommus = <&apps_smmu 0x1008 0x0460>;
|
||||
};
|
||||
|
||||
/* note: secure cb9 in downstream */
|
||||
|
|
|
|||
|
|
@ -2128,7 +2128,7 @@ ufs_mem_hc: ufshc@1d84000 {
|
|||
|
||||
ufs_mem_phy: phy@1d87000 {
|
||||
compatible = "qcom,sm8350-qmp-ufs-phy";
|
||||
reg = <0 0x01d87000 0 0xe10>;
|
||||
reg = <0 0x01d87000 0 0x1c4>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
/*
|
||||
* Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
|
||||
* Copyright (c) 2020 Engicam srl
|
||||
* Copyright (c) 2020 Amarula Solutons
|
||||
* Copyright (c) 2020 Amarula Solutons(India)
|
||||
* Copyright (c) 2020 Amarula Solutions
|
||||
* Copyright (c) 2020 Amarula Solutions(India)
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
|
|
|||
|
|
@ -88,3 +88,8 @@ h1_int_od_l: h1-int-od-l {
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
&wlan_host_wake_l {
|
||||
/* Kevin has an external pull up, but Bob does not. */
|
||||
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -244,6 +244,14 @@ &dmc {
|
|||
&edp {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* eDP PHY/clk don't sync reliably at anything other than 24 MHz. Only
|
||||
* set this here, because rk3399-gru.dtsi ensures we can generate this
|
||||
* off GPLL=600MHz, whereas some other RK3399 boards may not.
|
||||
*/
|
||||
assigned-clocks = <&cru PCLK_EDP>;
|
||||
assigned-clock-rates = <24000000>;
|
||||
|
||||
ports {
|
||||
edp_out: port@1 {
|
||||
reg = <1>;
|
||||
|
|
@ -578,6 +586,7 @@ wifi_perst_l: wifi-perst-l {
|
|||
};
|
||||
|
||||
wlan_host_wake_l: wlan-host-wake-l {
|
||||
/* Kevin has an external pull up, but Bob does not */
|
||||
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -62,7 +62,6 @@ vcc3v3_sys: vcc3v3-sys {
|
|||
vcc5v0_host: vcc5v0-host-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
|
||||
enable-active-low;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc5v0_host_en>;
|
||||
regulator-name = "vcc5v0_host";
|
||||
|
|
|
|||
|
|
@ -189,7 +189,6 @@ vcc5v0_usb20_otg: vcc5v0_usb20_otg {
|
|||
|
||||
vcc3v3_sd: vcc3v3_sd {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-low;
|
||||
gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc_sd_h>;
|
||||
|
|
|
|||
|
|
@ -506,7 +506,7 @@ &sdmmc0 {
|
|||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
sd-uhs-sdr104;
|
||||
sd-uhs-sdr50;
|
||||
vmmc-supply = <&vcc3v3_sd>;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
status = "okay";
|
||||
|
|
|
|||
|
|
@ -678,7 +678,7 @@ &usb_host0_ohci {
|
|||
};
|
||||
|
||||
&usb_host0_xhci {
|
||||
extcon = <&usb2phy0>;
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -656,7 +656,7 @@ &usb2phy0_host {
|
|||
};
|
||||
|
||||
&usb2phy0_otg {
|
||||
vbus-supply = <&vcc5v0_usb_otg>;
|
||||
phy-supply = <&vcc5v0_usb_otg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -581,7 +581,7 @@ &usb2phy0_host {
|
|||
};
|
||||
|
||||
&usb2phy0_otg {
|
||||
vbus-supply = <&vcc5v0_usb_otg>;
|
||||
phy-supply = <&vcc5v0_usb_otg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -48,6 +48,7 @@ CONFIG_ARCH_KEEMBAY=y
|
|||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_ARCH_MESON=y
|
||||
CONFIG_ARCH_MVEBU=y
|
||||
CONFIG_ARCH_NXP=y
|
||||
CONFIG_ARCH_MXC=y
|
||||
CONFIG_ARCH_NPCM=y
|
||||
CONFIG_ARCH_QCOM=y
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@ CONFIG_CP15_BARRIER_EMULATION=y
|
|||
CONFIG_SETEND_EMULATION=y
|
||||
CONFIG_RANDOMIZE_BASE=y
|
||||
# CONFIG_RANDOMIZE_MODULE_REGION_FULL is not set
|
||||
CONFIG_CMDLINE="console=ttynull stack_depot_disable=on cgroup_disable=pressure kasan.stacktrace=off kvm-arm.mode=protected"
|
||||
CONFIG_CMDLINE="console=ttynull stack_depot_disable=on cgroup_disable=pressure kasan.stacktrace=off kvm-arm.mode=protected bootconfig ioremap_guard"
|
||||
# CONFIG_DMI is not set
|
||||
CONFIG_PM_WAKELOCKS=y
|
||||
CONFIG_PM_WAKELOCKS_LIMIT=0
|
||||
|
|
@ -383,7 +383,6 @@ CONFIG_HW_RANDOM=y
|
|||
CONFIG_I3C=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_MEM=y
|
||||
CONFIG_SPMI=y
|
||||
# CONFIG_SPMI_MSM_PMIC_ARB is not set
|
||||
# CONFIG_PINCTRL_SUN8I_H3_R is not set
|
||||
# CONFIG_PINCTRL_SUN50I_A64 is not set
|
||||
|
|
|
|||
|
|
@ -1425,6 +1425,7 @@ const struct cpumask *system_32bit_el0_cpumask(void)
|
|||
|
||||
return cpu_possible_mask;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(system_32bit_el0_cpumask);
|
||||
|
||||
static int __init parse_32bit_el0_param(char *str)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1084,7 +1084,6 @@ static int za_set(struct task_struct *target,
|
|||
if (!target->thread.sve_state) {
|
||||
sve_alloc(target, false);
|
||||
if (!target->thread.sve_state) {
|
||||
clear_thread_flag(TIF_SME);
|
||||
ret = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
|
|
@ -1094,7 +1093,6 @@ static int za_set(struct task_struct *target,
|
|||
sme_alloc(target);
|
||||
if (!target->thread.za_state) {
|
||||
ret = -ENOMEM;
|
||||
clear_tsk_thread_flag(target, TIF_SME);
|
||||
goto out;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -101,6 +101,9 @@ SYM_FUNC_END(__cpu_suspend_enter)
|
|||
SYM_CODE_START(cpu_resume)
|
||||
bl init_kernel_el
|
||||
bl finalise_el2
|
||||
#if VA_BITS > 48
|
||||
ldr_l x0, vabits_actual
|
||||
#endif
|
||||
bl __cpu_setup
|
||||
/* enable the MMU early - so we can access sleep_save_stash by va */
|
||||
adrp x1, swapper_pg_dir
|
||||
|
|
|
|||
|
|
@ -237,7 +237,7 @@ static void amu_fie_setup(const struct cpumask *cpus)
|
|||
for_each_cpu(cpu, cpus) {
|
||||
if (!freq_counters_valid(cpu) ||
|
||||
freq_inv_set_max_ratio(cpu,
|
||||
cpufreq_get_hw_max_freq(cpu) * 1000,
|
||||
cpufreq_get_hw_max_freq(cpu) * 1000ULL,
|
||||
arch_timer_get_rate()))
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2114,7 +2114,7 @@ static int finalize_hyp_mode(void)
|
|||
* at, which would end badly once inaccessible.
|
||||
*/
|
||||
kmemleak_free_part(__hyp_bss_start, __hyp_bss_end - __hyp_bss_start);
|
||||
kmemleak_free_part(__va(hyp_mem_base), hyp_mem_size);
|
||||
kmemleak_free_part_phys(hyp_mem_base, hyp_mem_size);
|
||||
return pkvm_drop_host_privileges();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -331,12 +331,6 @@ static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end,
|
|||
}
|
||||
BUG_ON(p4d_bad(p4d));
|
||||
|
||||
/*
|
||||
* No need for locking during early boot. And it doesn't work as
|
||||
* expected with KASLR enabled.
|
||||
*/
|
||||
if (system_state != SYSTEM_BOOTING)
|
||||
mutex_lock(&fixmap_lock);
|
||||
pudp = pud_set_fixmap_offset(p4dp, addr);
|
||||
do {
|
||||
pud_t old_pud = READ_ONCE(*pudp);
|
||||
|
|
@ -368,15 +362,13 @@ static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end,
|
|||
} while (pudp++, addr = next, addr != end);
|
||||
|
||||
pud_clear_fixmap();
|
||||
if (system_state != SYSTEM_BOOTING)
|
||||
mutex_unlock(&fixmap_lock);
|
||||
}
|
||||
|
||||
static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
|
||||
unsigned long virt, phys_addr_t size,
|
||||
pgprot_t prot,
|
||||
phys_addr_t (*pgtable_alloc)(int),
|
||||
int flags)
|
||||
static void __create_pgd_mapping_locked(pgd_t *pgdir, phys_addr_t phys,
|
||||
unsigned long virt, phys_addr_t size,
|
||||
pgprot_t prot,
|
||||
phys_addr_t (*pgtable_alloc)(int),
|
||||
int flags)
|
||||
{
|
||||
unsigned long addr, end, next;
|
||||
pgd_t *pgdp = pgd_offset_pgd(pgdir, virt);
|
||||
|
|
@ -400,8 +392,20 @@ static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
|
|||
} while (pgdp++, addr = next, addr != end);
|
||||
}
|
||||
|
||||
static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
|
||||
unsigned long virt, phys_addr_t size,
|
||||
pgprot_t prot,
|
||||
phys_addr_t (*pgtable_alloc)(int),
|
||||
int flags)
|
||||
{
|
||||
mutex_lock(&fixmap_lock);
|
||||
__create_pgd_mapping_locked(pgdir, phys, virt, size, prot,
|
||||
pgtable_alloc, flags);
|
||||
mutex_unlock(&fixmap_lock);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
|
||||
extern __alias(__create_pgd_mapping)
|
||||
extern __alias(__create_pgd_mapping_locked)
|
||||
void create_kpti_ng_temp_pgd(pgd_t *pgdir, phys_addr_t phys, unsigned long virt,
|
||||
phys_addr_t size, pgprot_t prot,
|
||||
phys_addr_t (*pgtable_alloc)(int), int flags);
|
||||
|
|
|
|||
|
|
@ -2669,7 +2669,6 @@ config ARCH_FLATMEM_ENABLE
|
|||
|
||||
config ARCH_SPARSEMEM_ENABLE
|
||||
bool
|
||||
select SPARSEMEM_STATIC if !SGI_IP27
|
||||
|
||||
config NUMA
|
||||
bool "NUMA Support"
|
||||
|
|
|
|||
|
|
@ -57,14 +57,11 @@ EXPORT_SYMBOL_GPL(__cvmx_cmd_queue_state_ptr);
|
|||
static cvmx_cmd_queue_result_t __cvmx_cmd_queue_init_state_ptr(void)
|
||||
{
|
||||
char *alloc_name = "cvmx_cmd_queues";
|
||||
#if defined(CONFIG_CAVIUM_RESERVE32) && CONFIG_CAVIUM_RESERVE32
|
||||
extern uint64_t octeon_reserve32_memory;
|
||||
#endif
|
||||
|
||||
if (likely(__cvmx_cmd_queue_state_ptr))
|
||||
return CVMX_CMD_QUEUE_SUCCESS;
|
||||
|
||||
#if defined(CONFIG_CAVIUM_RESERVE32) && CONFIG_CAVIUM_RESERVE32
|
||||
if (octeon_reserve32_memory)
|
||||
__cvmx_cmd_queue_state_ptr =
|
||||
cvmx_bootmem_alloc_named_range(sizeof(*__cvmx_cmd_queue_state_ptr),
|
||||
|
|
@ -73,7 +70,6 @@ static cvmx_cmd_queue_result_t __cvmx_cmd_queue_init_state_ptr(void)
|
|||
(CONFIG_CAVIUM_RESERVE32 <<
|
||||
20) - 1, 128, alloc_name);
|
||||
else
|
||||
#endif
|
||||
__cvmx_cmd_queue_state_ptr =
|
||||
cvmx_bootmem_alloc_named(sizeof(*__cvmx_cmd_queue_state_ptr),
|
||||
128,
|
||||
|
|
|
|||
|
|
@ -127,6 +127,16 @@ static void octeon_irq_free_cd(struct irq_domain *d, unsigned int irq)
|
|||
static int octeon_irq_force_ciu_mapping(struct irq_domain *domain,
|
||||
int irq, int line, int bit)
|
||||
{
|
||||
struct device_node *of_node;
|
||||
int ret;
|
||||
|
||||
of_node = irq_domain_get_of_node(domain);
|
||||
if (!of_node)
|
||||
return -EINVAL;
|
||||
ret = irq_alloc_desc_at(irq, of_node_to_nid(of_node));
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return irq_domain_associate(domain, irq, line << 6 | bit);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -284,10 +284,8 @@ void octeon_crash_smp_send_stop(void)
|
|||
|
||||
#endif /* CONFIG_KEXEC */
|
||||
|
||||
#ifdef CONFIG_CAVIUM_RESERVE32
|
||||
uint64_t octeon_reserve32_memory;
|
||||
EXPORT_SYMBOL(octeon_reserve32_memory);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_KEXEC
|
||||
/* crashkernel cmdline parameter is parsed _after_ memory setup
|
||||
|
|
@ -666,9 +664,6 @@ void __init prom_init(void)
|
|||
int i;
|
||||
u64 t;
|
||||
int argc;
|
||||
#ifdef CONFIG_CAVIUM_RESERVE32
|
||||
int64_t addr = -1;
|
||||
#endif
|
||||
/*
|
||||
* The bootloader passes a pointer to the boot descriptor in
|
||||
* $a3, this is available as fw_arg3.
|
||||
|
|
@ -783,7 +778,7 @@ void __init prom_init(void)
|
|||
cvmx_write_csr(CVMX_LED_UDD_DATX(1), 0);
|
||||
cvmx_write_csr(CVMX_LED_EN, 1);
|
||||
}
|
||||
#ifdef CONFIG_CAVIUM_RESERVE32
|
||||
|
||||
/*
|
||||
* We need to temporarily allocate all memory in the reserve32
|
||||
* region. This makes sure the kernel doesn't allocate this
|
||||
|
|
@ -794,14 +789,16 @@ void __init prom_init(void)
|
|||
* Allocate memory for RESERVED32 aligned on 2MB boundary. This
|
||||
* is in case we later use hugetlb entries with it.
|
||||
*/
|
||||
addr = cvmx_bootmem_phy_named_block_alloc(CONFIG_CAVIUM_RESERVE32 << 20,
|
||||
0, 0, 2 << 20,
|
||||
"CAVIUM_RESERVE32", 0);
|
||||
if (addr < 0)
|
||||
pr_err("Failed to allocate CAVIUM_RESERVE32 memory area\n");
|
||||
else
|
||||
octeon_reserve32_memory = addr;
|
||||
#endif
|
||||
if (CONFIG_CAVIUM_RESERVE32) {
|
||||
int64_t addr =
|
||||
cvmx_bootmem_phy_named_block_alloc(CONFIG_CAVIUM_RESERVE32 << 20,
|
||||
0, 0, 2 << 20,
|
||||
"CAVIUM_RESERVE32", 0);
|
||||
if (addr < 0)
|
||||
pr_err("Failed to allocate CAVIUM_RESERVE32 memory area\n");
|
||||
else
|
||||
octeon_reserve32_memory = addr;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CAVIUM_OCTEON_LOCK_L2
|
||||
if (cvmx_read_csr(CVMX_L2D_FUS3) & (3ull << 34)) {
|
||||
|
|
@ -1079,7 +1076,6 @@ void __init plat_mem_setup(void)
|
|||
cvmx_bootmem_unlock();
|
||||
#endif /* CONFIG_CRASH_DUMP */
|
||||
|
||||
#ifdef CONFIG_CAVIUM_RESERVE32
|
||||
/*
|
||||
* Now that we've allocated the kernel memory it is safe to
|
||||
* free the reserved region. We free it here so that builtin
|
||||
|
|
@ -1087,7 +1083,6 @@ void __init plat_mem_setup(void)
|
|||
*/
|
||||
if (octeon_reserve32_memory)
|
||||
cvmx_bootmem_free_named("CAVIUM_RESERVE32");
|
||||
#endif /* CONFIG_CAVIUM_RESERVE32 */
|
||||
|
||||
if (total == 0)
|
||||
panic("Unable to allocate memory from "
|
||||
|
|
|
|||
|
|
@ -50,6 +50,7 @@ struct clk *clk_get_io(void)
|
|||
{
|
||||
return &cpu_clk_generic[2];
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(clk_get_io);
|
||||
|
||||
struct clk *clk_get_ppe(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -98,7 +98,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
|
|||
if (plat_dat->bus_id) {
|
||||
__raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
|
||||
GMAC1_USE_UART0, LS1X_MUX_CTRL0);
|
||||
switch (plat_dat->interface) {
|
||||
switch (plat_dat->phy_interface) {
|
||||
case PHY_INTERFACE_MODE_RGMII:
|
||||
val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
|
||||
break;
|
||||
|
|
@ -107,12 +107,12 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
|
|||
break;
|
||||
default:
|
||||
pr_err("unsupported mii mode %d\n",
|
||||
plat_dat->interface);
|
||||
plat_dat->phy_interface);
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
val &= ~GMAC1_SHUT;
|
||||
} else {
|
||||
switch (plat_dat->interface) {
|
||||
switch (plat_dat->phy_interface) {
|
||||
case PHY_INTERFACE_MODE_RGMII:
|
||||
val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
|
||||
break;
|
||||
|
|
@ -121,7 +121,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
|
|||
break;
|
||||
default:
|
||||
pr_err("unsupported mii mode %d\n",
|
||||
plat_dat->interface);
|
||||
plat_dat->phy_interface);
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
val &= ~GMAC0_SHUT;
|
||||
|
|
@ -131,7 +131,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
|
|||
plat_dat = dev_get_platdata(&pdev->dev);
|
||||
|
||||
val &= ~PHY_INTF_SELI;
|
||||
if (plat_dat->interface == PHY_INTERFACE_MODE_RMII)
|
||||
if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
|
||||
val |= 0x4 << PHY_INTF_SELI_SHIFT;
|
||||
__raw_writel(val, LS1X_MUX_CTRL1);
|
||||
|
||||
|
|
@ -146,9 +146,9 @@ static struct plat_stmmacenet_data ls1x_eth0_pdata = {
|
|||
.bus_id = 0,
|
||||
.phy_addr = -1,
|
||||
#if defined(CONFIG_LOONGSON1_LS1B)
|
||||
.interface = PHY_INTERFACE_MODE_MII,
|
||||
.phy_interface = PHY_INTERFACE_MODE_MII,
|
||||
#elif defined(CONFIG_LOONGSON1_LS1C)
|
||||
.interface = PHY_INTERFACE_MODE_RMII,
|
||||
.phy_interface = PHY_INTERFACE_MODE_RMII,
|
||||
#endif
|
||||
.mdio_bus_data = &ls1x_mdio_bus_data,
|
||||
.dma_cfg = &ls1x_eth_dma_cfg,
|
||||
|
|
@ -186,7 +186,7 @@ struct platform_device ls1x_eth0_pdev = {
|
|||
static struct plat_stmmacenet_data ls1x_eth1_pdata = {
|
||||
.bus_id = 1,
|
||||
.phy_addr = -1,
|
||||
.interface = PHY_INTERFACE_MODE_MII,
|
||||
.phy_interface = PHY_INTERFACE_MODE_MII,
|
||||
.mdio_bus_data = &ls1x_mdio_bus_data,
|
||||
.dma_cfg = &ls1x_eth_dma_cfg,
|
||||
.has_gmac = 1,
|
||||
|
|
|
|||
|
|
@ -15,7 +15,6 @@ static struct platform_device *ls1c_platform_devices[] __initdata = {
|
|||
static int __init ls1c_platform_init(void)
|
||||
{
|
||||
ls1x_serial_set_uartclk(&ls1x_uart_pdev);
|
||||
ls1x_rtc_set_extclk(&ls1x_rtc_pdev);
|
||||
|
||||
return platform_add_devices(ls1c_platform_devices,
|
||||
ARRAY_SIZE(ls1c_platform_devices));
|
||||
|
|
|
|||
|
|
@ -224,8 +224,18 @@ config MLONGCALLS
|
|||
Enabling this option will probably slow down your kernel.
|
||||
|
||||
config 64BIT
|
||||
def_bool "$(ARCH)" = "parisc64"
|
||||
def_bool y if "$(ARCH)" = "parisc64"
|
||||
bool "64-bit kernel" if "$(ARCH)" = "parisc"
|
||||
depends on PA8X00
|
||||
help
|
||||
Enable this if you want to support 64bit kernel on PA-RISC platform.
|
||||
|
||||
At the moment, only people willing to use more than 2GB of RAM,
|
||||
or having a 64bit-only capable PA-RISC machine should say Y here.
|
||||
|
||||
Since there is no 64bit userland on PA-RISC, there is no point to
|
||||
enable this option otherwise. The 64bit kernel is significantly bigger
|
||||
and slower than the 32bit one.
|
||||
|
||||
choice
|
||||
prompt "Kernel page size"
|
||||
|
|
|
|||
|
|
@ -480,7 +480,7 @@ static void execute_on_irq_stack(void *func, unsigned long param1)
|
|||
*irq_stack_in_use = 1;
|
||||
}
|
||||
|
||||
#ifndef CONFIG_PREEMPT_RT
|
||||
#ifdef CONFIG_SOFTIRQ_ON_OWN_STACK
|
||||
void do_softirq_own_stack(void)
|
||||
{
|
||||
execute_on_irq_stack(__do_softirq, 0);
|
||||
|
|
|
|||
|
|
@ -199,7 +199,7 @@ static inline void check_stack_overflow(unsigned long sp)
|
|||
}
|
||||
}
|
||||
|
||||
#ifndef CONFIG_PREEMPT_RT
|
||||
#ifdef CONFIG_SOFTIRQ_ON_OWN_STACK
|
||||
static __always_inline void call_do_softirq(const void *sp)
|
||||
{
|
||||
/* Temporarily switch r1 to sp, call __do_softirq() then restore r1. */
|
||||
|
|
@ -335,7 +335,7 @@ void *mcheckirq_ctx[NR_CPUS] __read_mostly;
|
|||
void *softirq_ctx[NR_CPUS] __read_mostly;
|
||||
void *hardirq_ctx[NR_CPUS] __read_mostly;
|
||||
|
||||
#ifndef CONFIG_PREEMPT_RT
|
||||
#ifdef CONFIG_SOFTIRQ_ON_OWN_STACK
|
||||
void do_softirq_own_stack(void)
|
||||
{
|
||||
call_do_softirq(softirq_ctx[smp_processor_id()]);
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue
Block a user