diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index ca8e61254c44..8f8bebf8b73a 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "qcom_common.h" #include "qcom_pil_info.h" @@ -51,6 +52,8 @@ struct qcom_pas_data { bool decrypt_shutdown; char **proxy_pd_names; + const unsigned int *proxy_pd_performance_states; + unsigned int num_proxy_pd_performance_states; const char *load_state; const char *ssr_name; @@ -79,6 +82,7 @@ struct qcom_pas { struct regulator *px_supply; struct device *proxy_pds[3]; + const unsigned int *proxy_pd_performance_states; int proxy_pd_count; @@ -167,7 +171,12 @@ static int qcom_pas_pds_enable(struct qcom_pas *pas, struct device **pds, int i; for (i = 0; i < pd_count; i++) { - dev_pm_genpd_set_performance_state(pds[i], INT_MAX); + unsigned int state = INT_MAX; + + if (pas->proxy_pd_performance_states) + state = pas->proxy_pd_performance_states[i]; + + dev_pm_genpd_set_performance_state(pds[i], state); ret = pm_runtime_get_sync(pds[i]); if (ret < 0) { pm_runtime_put_noidle(pds[i]); @@ -871,6 +880,7 @@ static int qcom_pas_probe(struct platform_device *pdev) pas->info_name = desc->sysmon_name; pas->smem_host_id = desc->smem_host_id; pas->decrypt_shutdown = desc->decrypt_shutdown; + pas->proxy_pd_performance_states = desc->proxy_pd_performance_states; pas->region_assign_idx = desc->region_assign_idx; pas->region_assign_count = min_t(int, MAX_ASSIGN_COUNT, desc->region_assign_count); pas->region_assign_vmid = desc->region_assign_vmid; @@ -906,6 +916,15 @@ static int qcom_pas_probe(struct platform_device *pdev) goto unassign_mem; pas->proxy_pd_count = ret; + if (desc->proxy_pd_performance_states && + desc->num_proxy_pd_performance_states != pas->proxy_pd_count) { + dev_err(&pdev->dev, + "proxy_pd_performance_states count %u != pd count %d\n", + desc->num_proxy_pd_performance_states, pas->proxy_pd_count); + ret = -EINVAL; + goto detach_proxy_pds; + } + ret = qcom_q6v5_init(&pas->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state, qcom_pas_handover); if (ret) @@ -1796,6 +1815,33 @@ static const struct qcom_pas_data glymur_soccp_resource = { .needs_tzmem = true, }; +static const struct qcom_pas_data hawi_cdsp_resource = { + .crash_reason_smem = 601, + .firmware_name = "cdsp.mdt", + .dtb_firmware_name = "cdsp_dtb.mdt", + .pas_id = 18, + .dtb_pas_id = 0x25, + .minidump_id = 7, + .auto_boot = true, + .proxy_pd_names = (char*[]){ + "cx", + "mxc", + "nsp", + NULL + }, + .proxy_pd_performance_states = (const unsigned int[]){ + RPMH_REGULATOR_LEVEL_TURBO, + RPMH_REGULATOR_LEVEL_TURBO, + RPMH_REGULATOR_LEVEL_NOM, + }, + .num_proxy_pd_performance_states = 3, + .load_state = "cdsp", + .ssr_name = "cdsp", + .sysmon_name = "cdsp", + .ssctl_id = 0x17, + .smem_host_id = 5, +}; + static const struct qcom_pas_data eliza_cdsp_resource = { .crash_reason_smem = 601, .firmware_name = "cdsp.mbn", @@ -1825,6 +1871,7 @@ static const struct of_device_id qcom_pas_of_match[] = { { .compatible = "qcom,eliza-adsp-pas", .data = &sm8550_adsp_resource }, { .compatible = "qcom,eliza-cdsp-pas", .data = &eliza_cdsp_resource }, { .compatible = "qcom,glymur-soccp-pas", .data = &glymur_soccp_resource }, + { .compatible = "qcom,hawi-cdsp-pas", .data = &hawi_cdsp_resource }, { .compatible = "qcom,kaanapali-soccp-pas", .data = &kaanapali_soccp_resource }, { .compatible = "qcom,milos-adsp-pas", .data = &sm8550_adsp_resource }, { .compatible = "qcom,milos-cdsp-pas", .data = &milos_cdsp_resource },