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drm/amd/display: Enable HUBP/OPTC/DPP power gating

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[Why & How]
Enable driver power gating on DCN42 for HUBP OPTC
and DPP HW blocks.

Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Leo Chen <leo.chen@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Leo Chen 2026-04-13 15:42:35 -04:00 committed by Alex Deucher
parent 27b7b67f21
commit 2eb0681ea7
1 changed files with 6 additions and 5 deletions
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11
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
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@ -694,9 +694,12 @@ static const struct dc_debug_options debug_defaults_drv = {
.force_abm_enable = false,
.clock_trace = true,
.disable_pplib_clock_request = false,
.disable_dpp_power_gate = true,
.disable_hubp_power_gate = true,
.disable_optc_power_gate = true,
.ignore_pg = false,
.disable_dpp_power_gate = false,
.disable_hubp_power_gate = false,
.disable_optc_power_gate = false,
.disable_dsc_power_gate = false,
.disable_dio_power_gate = true,
.pipe_split_policy = MPC_SPLIT_AVOID,
.force_single_disp_pipe_split = false,
.disable_dcc = DCC_ENABLE,
@ -758,12 +761,10 @@ static const struct dc_debug_options debug_defaults_drv = {
.min_disp_clk_khz = 50000,
.static_screen_wait_frames = 2,
.disable_z10 = false,
.ignore_pg = false,
.disable_stutter_for_wm_program = true,
.min_deep_sleep_dcfclk_khz = 8000,
.replay_skip_crtc_disabled = true,
.psr_skip_crtc_disable = true,
.disable_dio_power_gate = true,
};
static const struct dc_check_config config_defaults = {