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crypto: qat - fix heartbeat error injection
The current implementation of the heartbeat error injection uses
adf_disable_arb_thd() to stop a specific accelerator engine thread
from processing requests. This does not reliably prevent the device
from generating responses.
Fix the error injection by disabling the device arbiter through
exit_arb() instead. This properly simulates a device failure by
stopping all arbitration, which results in missing responses for
sent requests.
Remove the now unused adf_disable_arb_thd() function and its
declaration.
Fixes: e2b67859ab ("crypto: qat - add heartbeat error simulator")
Signed-off-by: Damian Muszynski <damian.muszynski@intel.com>
Reviewed-by: Ahsan Atta <ahsan.atta@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
parent
52d167bb09
commit
2e96024632
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@ -92,7 +92,6 @@ void adf_exit_aer(void);
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int adf_init_arb(struct adf_accel_dev *accel_dev);
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void adf_exit_arb(struct adf_accel_dev *accel_dev);
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void adf_update_ring_arb(struct adf_etr_ring_data *ring);
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int adf_disable_arb_thd(struct adf_accel_dev *accel_dev, u32 ae, u32 thr);
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int adf_dev_get(struct adf_accel_dev *accel_dev);
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void adf_dev_put(struct adf_accel_dev *accel_dev);
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@ -64,10 +64,8 @@ int adf_heartbeat_inject_error(struct adf_accel_dev *accel_dev)
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if (ret)
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return ret;
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/* Configure worker threads to stop processing any packet */
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ret = adf_disable_arb_thd(accel_dev, rand_ae, rand_thr);
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if (ret)
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return ret;
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/* Disable arbiter to stop processing any packet */
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hw_device->exit_arb(accel_dev);
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/* Change HB counters memory to simulate a hang */
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adf_set_hb_counters_fail(accel_dev, rand_ae, rand_thr);
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@ -99,28 +99,3 @@ void adf_exit_arb(struct adf_accel_dev *accel_dev)
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csr_ops->write_csr_ring_srv_arb_en(csr, i, 0);
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}
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EXPORT_SYMBOL_GPL(adf_exit_arb);
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int adf_disable_arb_thd(struct adf_accel_dev *accel_dev, u32 ae, u32 thr)
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{
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void __iomem *csr = accel_dev->transport->banks[0].csr_addr;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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const u32 *thd_2_arb_cfg;
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struct arb_info info;
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u32 ae_thr_map;
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if (ADF_AE_STRAND0_THREAD == thr || ADF_AE_STRAND1_THREAD == thr)
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thr = ADF_AE_ADMIN_THREAD;
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hw_data->get_arb_info(&info);
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thd_2_arb_cfg = hw_data->get_arb_mapping(accel_dev);
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if (!thd_2_arb_cfg)
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return -EFAULT;
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/* Disable scheduling for this particular AE and thread */
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ae_thr_map = *(thd_2_arb_cfg + ae);
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ae_thr_map &= ~(GENMASK(3, 0) << (thr * BIT(2)));
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WRITE_CSR_ARB_WT2SAM(csr, info.arb_offset, info.wt2sam_offset, ae,
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ae_thr_map);
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return 0;
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}
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