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arm64: dts: nuvoton: combine NPCM845 reset and clk nodes

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Combine the NPCM845 reset and clock controller nodes into a single node
with compatible "nuvoton,npcm845-reset" in nuvoton-common-npcm8xx.dtsi,
using the auxiliary device framework to provide clock functionality.

Update the register range to 0xC4 to cover the shared reset and clock
registers at 0xf0801000.

Remove the separate nuvoton,npcm845-clk node, as the reset driver now
handles clocks via an auxiliary device.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://patch.msgid.link/20250706134207.2168184-2-tmaimon77@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
This commit is contained in:
Tomer Maimon 2025-07-06 16:42:06 +03:00 committed by Andrew Jeffery
parent 91f8329e67
commit 2e6028f8fa
1 changed files with 3 additions and 8 deletions
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11
arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
View File

@ -42,17 +42,12 @@ ahb {
interrupt-parent = <&gic>;
ranges;
rstc: reset-controller@f0801000 {
clk: rstc: reset-controller@f0801000 {
compatible = "nuvoton,npcm845-reset";
reg = <0x0 0xf0801000 0x0 0x78>;
#reset-cells = <2>;
reg = <0x0 0xf0801000 0x0 0xC4>;
nuvoton,sysgcr = <&gcr>;
};
clk: clock-controller@f0801000 {
compatible = "nuvoton,npcm845-clk";
#reset-cells = <2>;
#clock-cells = <1>;
reg = <0x0 0xf0801000 0x0 0x1000>;
};
apb {