github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-24 07:03:03 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

drm: exynos: dsi: Properly name HSA/HBP/HFP/HSE bits

Browse Source 
HSA/HBP/HFP/HSE mode bits in Processor Reference Manuals specify
a naming conversion as 'disable mode bit' due to its bit definition,
0 = Enable and 1 = Disable.

For HSE bit, the i.MX 8M Mini/Nano/Plus Applications Processor
Reference Manual named this bit as 'HseDisableMode' but the bit
definition is quite opposite like
0 = Disables transfer
1 = Enables transfer
which clearly states that HSE is not a disable bit.

HSE is named as per the manual even though it is not a disable
bit however the driver logic for handling HSE is based on the
MIPI_DSI_MODE_VIDEO_HSE flag itself.

Cc: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20221212145745.15387-2-jagan@amarulasolutions.com
This commit is contained in:
Jagan Teki 2022-12-12 20:27:45 +05:30 committed by Marek Vasut
parent 996e1defca
commit 2e337a8d14
1 changed files with 25 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
drivers/gpu/drm/exynos/exynos_drm_dsi.c
View File

@ -75,10 +75,27 @@
#define DSIM_MAIN_PIX_FORMAT_RGB565 (0x4 << 12)
#define DSIM_SUB_VC (((x) & 0x3) << 16)
#define DSIM_MAIN_VC (((x) & 0x3) << 18)
#define DSIM_HSA_MODE (1 << 20)
#define DSIM_HBP_MODE (1 << 21)
#define DSIM_HFP_MODE (1 << 22)
#define DSIM_HSE_MODE (1 << 23)
#define DSIM_HSA_DISABLE_MODE (1 << 20)
#define DSIM_HBP_DISABLE_MODE (1 << 21)
#define DSIM_HFP_DISABLE_MODE (1 << 22)
/*
* The i.MX 8M Mini Applications Processor Reference Manual,
* Rev. 3, 11/2020 Page 4091
* The i.MX 8M Nano Applications Processor Reference Manual,
* Rev. 2, 07/2022 Page 3058
* The i.MX 8M Plus Applications Processor Reference Manual,
* Rev. 1, 06/2021 Page 5436
* named this bit as 'HseDisableMode' but the bit definition
* is quite opposite like
* 0 = Disables transfer
* 1 = Enables transfer
* which clearly states that HSE is not a disable bit.
*
* This bit is named as per the manual even though it is not
* a disable bit however the driver logic for handling HSE
* is based on the MIPI_DSI_MODE_VIDEO_HSE flag itself.
*/
#define DSIM_HSE_DISABLE_MODE (1 << 23)
#define DSIM_AUTO_MODE (1 << 24)
#define DSIM_VIDEO_MODE (1 << 25)
#define DSIM_BURST_MODE (1 << 26)
@ -804,13 +821,13 @@ static int exynos_dsi_init_link(struct exynos_dsi *dsi)
if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_AUTO_VERT)
reg |= DSIM_AUTO_MODE;
if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HSE)
reg |= DSIM_HSE_MODE;
reg |= DSIM_HSE_DISABLE_MODE;
if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HFP)
reg |= DSIM_HFP_MODE;
reg |= DSIM_HFP_DISABLE_MODE;
if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HBP)
reg |= DSIM_HBP_MODE;
reg |= DSIM_HBP_DISABLE_MODE;
if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HSA)
reg |= DSIM_HSA_MODE;
reg |= DSIM_HSA_DISABLE_MODE;
}
if (dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET)