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Merge branch 'net-dsa-mt7530-assorted-fixes'
Daniel Golle says: ==================== net: dsa: mt7530: assorted fixes A batch of small, independent fixes for the MediaTek MT7530 family DSA driver, addressing long-standing correctness issues that surface on hardware with bridge VLAN filtering enabled, on link-local frame reception, and during bridge join/leave transitions. ==================== Link: https://patch.msgid.link/cover.1778766629.git.daniel@makrotopia.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Paolo Abeni
commit
2d85ae5d0f
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@ -1023,12 +1023,16 @@ mt7530_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)
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unsigned int age_count;
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unsigned int age_unit;
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/* Applied timer is (AGE_CNT + 1) * (AGE_UNIT + 1) seconds */
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if (secs < 1 || secs > (AGE_CNT_MAX + 1) * (AGE_UNIT_MAX + 1))
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return -ERANGE;
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/* iterate through all possible age_count to find the closest pair */
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for (tmp_age_count = 0; tmp_age_count <= AGE_CNT_MAX; ++tmp_age_count) {
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/* Applied timer is (AGE_CNT + 1) * (AGE_UNIT + 1) seconds.
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* The DSA core has already validated the range using
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* ds->ageing_time_min and ds->ageing_time_max.
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*
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* Iterate through all possible age_count values to find the closest
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* pair. Start from 1 because the per-entry aging counter is
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* initialized to AGE_CNT and a value of 0 means the entry will
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* never be aged out.
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*/
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for (tmp_age_count = 1; tmp_age_count <= AGE_CNT_MAX; ++tmp_age_count) {
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unsigned int tmp_age_unit = secs / (tmp_age_count + 1) - 1;
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if (tmp_age_unit <= AGE_UNIT_MAX) {
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@ -1296,37 +1300,40 @@ static void mt7530_setup_port5(struct dsa_switch *ds, phy_interface_t interface)
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static void
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mt753x_trap_frames(struct mt7530_priv *priv)
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{
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/* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress them
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* VLAN-untagged.
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/* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress
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* them with the EG_TAG attribute set to disabled (system default)
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* so that any VLAN tags in the frame are not modified by the
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* switch egress VLAN tag processing. This preserves VLAN tags
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* for reception on VLAN sub-interfaces.
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*/
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mt7530_rmw(priv, MT753X_BPC,
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PAE_BPDU_FR | PAE_EG_TAG_MASK | PAE_PORT_FW_MASK |
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BPDU_EG_TAG_MASK | BPDU_PORT_FW_MASK,
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PAE_BPDU_FR | PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
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PAE_BPDU_FR | PAE_EG_TAG(MT7530_VLAN_EG_DISABLED) |
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PAE_PORT_FW(TO_CPU_FW_CPU_ONLY) |
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BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
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BPDU_EG_TAG(MT7530_VLAN_EG_DISABLED) |
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TO_CPU_FW_CPU_ONLY);
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/* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and egress
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* them VLAN-untagged.
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/* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and
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* egress them with EG_TAG disabled.
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*/
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mt7530_rmw(priv, MT753X_RGAC1,
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R02_BPDU_FR | R02_EG_TAG_MASK | R02_PORT_FW_MASK |
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R01_BPDU_FR | R01_EG_TAG_MASK | R01_PORT_FW_MASK,
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R02_BPDU_FR | R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
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R02_BPDU_FR | R02_EG_TAG(MT7530_VLAN_EG_DISABLED) |
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R02_PORT_FW(TO_CPU_FW_CPU_ONLY) | R01_BPDU_FR |
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R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
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R01_EG_TAG(MT7530_VLAN_EG_DISABLED) |
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TO_CPU_FW_CPU_ONLY);
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/* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and egress
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* them VLAN-untagged.
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/* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and
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* egress them with EG_TAG disabled.
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*/
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mt7530_rmw(priv, MT753X_RGAC2,
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R0E_BPDU_FR | R0E_EG_TAG_MASK | R0E_PORT_FW_MASK |
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R03_BPDU_FR | R03_EG_TAG_MASK | R03_PORT_FW_MASK,
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R0E_BPDU_FR | R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
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R0E_BPDU_FR | R0E_EG_TAG(MT7530_VLAN_EG_DISABLED) |
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R0E_PORT_FW(TO_CPU_FW_CPU_ONLY) | R03_BPDU_FR |
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R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |
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R03_EG_TAG(MT7530_VLAN_EG_DISABLED) |
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TO_CPU_FW_CPU_ONLY);
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}
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@ -1616,6 +1623,49 @@ mt7530_port_bridge_join(struct dsa_switch *ds, int port,
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return 0;
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}
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static int
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mt7530_vlan_cmd(struct mt7530_priv *priv, enum mt7530_vlan_cmd cmd, u16 vid)
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{
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struct mt7530_dummy_poll p;
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u32 val;
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int ret;
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val = VTCR_BUSY | VTCR_FUNC(cmd) | vid;
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mt7530_write(priv, MT7530_VTCR, val);
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INIT_MT7530_DUMMY_POLL(&p, priv, MT7530_VTCR);
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ret = readx_poll_timeout(_mt7530_read, &p, val,
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!(val & VTCR_BUSY), 20, 20000);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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return ret;
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}
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val = mt7530_read(priv, MT7530_VTCR);
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if (val & VTCR_INVALID) {
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dev_err(priv->dev, "read VTCR invalid\n");
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return -EINVAL;
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}
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return 0;
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}
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static int
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mt7530_setup_vlan0(struct mt7530_priv *priv)
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{
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u32 val;
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/* Validate the entry with independent learning, keep the original
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* ingress tag attribute.
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*/
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val = IVL_MAC | EG_CON | PORT_MEM(MT7530_ALL_MEMBERS) | FID(FID_BRIDGED) |
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VLAN_VALID;
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mt7530_write(priv, MT7530_VAWD1, val);
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mt7530_write(priv, MT7530_VAWD2, 0);
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return mt7530_vlan_cmd(priv, MT7530_VTCR_WR_VID, 0);
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}
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static void
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mt7530_port_set_vlan_unaware(struct dsa_switch *ds, int port)
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{
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@ -1641,6 +1691,8 @@ mt7530_port_set_vlan_unaware(struct dsa_switch *ds, int port)
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G0_PORT_VID_DEF);
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for (i = 0; i < priv->ds->num_ports; i++) {
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if (i == port)
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continue;
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if (dsa_is_user_port(ds, i) &&
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dsa_port_is_vlan_filtering(dsa_to_port(ds, i))) {
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all_user_ports_removed = false;
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@ -1652,13 +1704,9 @@ mt7530_port_set_vlan_unaware(struct dsa_switch *ds, int port)
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* the CPU port get out of VLAN filtering mode.
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*/
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if (all_user_ports_removed) {
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struct dsa_port *dp = dsa_to_port(ds, port);
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struct dsa_port *cpu_dp = dp->cpu_dp;
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mt7530_write(priv, MT7530_PCR_P(cpu_dp->index),
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PCR_MATRIX(dsa_user_ports(priv->ds)));
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mt7530_write(priv, MT7530_PVC_P(cpu_dp->index), PORT_SPEC_TAG
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| PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
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mutex_lock(&priv->reg_mutex);
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mt7530_setup_vlan0(priv);
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mutex_unlock(&priv->reg_mutex);
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}
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}
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@ -1846,33 +1894,6 @@ mt7530_port_mdb_del(struct dsa_switch *ds, int port,
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return ret;
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}
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static int
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mt7530_vlan_cmd(struct mt7530_priv *priv, enum mt7530_vlan_cmd cmd, u16 vid)
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{
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struct mt7530_dummy_poll p;
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u32 val;
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int ret;
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val = VTCR_BUSY | VTCR_FUNC(cmd) | vid;
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mt7530_write(priv, MT7530_VTCR, val);
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INIT_MT7530_DUMMY_POLL(&p, priv, MT7530_VTCR);
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ret = readx_poll_timeout(_mt7530_read, &p, val,
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!(val & VTCR_BUSY), 20, 20000);
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if (ret < 0) {
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dev_err(priv->dev, "poll timeout\n");
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return ret;
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}
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val = mt7530_read(priv, MT7530_VTCR);
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if (val & VTCR_INVALID) {
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dev_err(priv->dev, "read VTCR invalid\n");
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return -EINVAL;
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}
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return 0;
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}
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static int
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mt7530_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,
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struct netlink_ext_ack *extack)
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@ -1977,21 +1998,6 @@ mt7530_hw_vlan_update(struct mt7530_priv *priv, u16 vid,
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mt7530_vlan_cmd(priv, MT7530_VTCR_WR_VID, vid);
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}
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static int
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mt7530_setup_vlan0(struct mt7530_priv *priv)
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{
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u32 val;
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/* Validate the entry with independent learning, keep the original
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* ingress tag attribute.
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*/
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val = IVL_MAC | EG_CON | PORT_MEM(MT7530_ALL_MEMBERS) | FID(FID_BRIDGED) |
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VLAN_VALID;
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mt7530_write(priv, MT7530_VAWD1, val);
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return mt7530_vlan_cmd(priv, MT7530_VTCR_WR_VID, 0);
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}
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static int
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mt7530_port_vlan_add(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_vlan *vlan,
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@ -2004,9 +2010,18 @@ mt7530_port_vlan_add(struct dsa_switch *ds, int port,
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mutex_lock(&priv->reg_mutex);
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/* VID 0 is managed exclusively by mt7530_setup_vlan0() for
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* VLAN-unaware bridge operation. Don't let the bridge overwrite
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* its EG_CON flag with VTAG_EN and corrupt PORT_MEM.
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*/
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if (vlan->vid == 0)
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goto skip_vlan_table;
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mt7530_hw_vlan_entry_init(&new_entry, port, untagged);
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mt7530_hw_vlan_update(priv, vlan->vid, &new_entry, mt7530_hw_vlan_add);
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skip_vlan_table:
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if (pvid) {
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priv->ports[port].pvid = vlan->vid;
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@ -2046,10 +2061,15 @@ mt7530_port_vlan_del(struct dsa_switch *ds, int port,
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mutex_lock(&priv->reg_mutex);
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/* VID 0 is managed exclusively by mt7530_setup_vlan0(). */
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if (vlan->vid == 0)
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goto skip_vlan_table;
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mt7530_hw_vlan_entry_init(&target_entry, port, 0);
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mt7530_hw_vlan_update(priv, vlan->vid, &target_entry,
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mt7530_hw_vlan_del);
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skip_vlan_table:
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/* PVID is being restored to the default whenever the PVID port
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* is being removed from the VLAN.
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*/
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@ -2427,7 +2447,10 @@ mt7530_setup(struct dsa_switch *ds)
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}
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ds->assisted_learning_on_cpu_port = true;
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ds->untag_vlan_aware_bridge_pvid = true;
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ds->mtu_enforcement_ingress = true;
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ds->ageing_time_min = 2 * 1000;
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ds->ageing_time_max = (AGE_CNT_MAX + 1) * (AGE_UNIT_MAX + 1) * 1000;
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if (priv->id == ID_MT7530) {
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regulator_set_voltage(priv->core_pwr, 1000000, 1000000);
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@ -2616,7 +2639,10 @@ mt7531_setup_common(struct dsa_switch *ds)
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int ret, i;
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ds->assisted_learning_on_cpu_port = true;
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ds->untag_vlan_aware_bridge_pvid = true;
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ds->mtu_enforcement_ingress = true;
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ds->ageing_time_min = 2 * 1000;
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ds->ageing_time_max = (AGE_CNT_MAX + 1) * (AGE_UNIT_MAX + 1) * 1000;
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mt753x_trap_frames(priv);
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