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Renesas fixes for v7.3

Browse Source 
- Fix Ethernet stalls on RZ/V2H, RZ/V2N, RZ/G3E, RZ/T2H, and RZ/N2H.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaprEkQAKCRCKwlD9ZEnx
 cMpLAP9H6eVF6pfnOLjgqE41gQUaMdn5SDmlIteD8Xyx8PQRngEA+CAMdw1oJeIy
 mtENt2HlmGqIYnNZhZ4Ip/VPQ5BIBwY=
 =usMX
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmqoDGkACgkQmmx57+YA
 GNmJqg//Vh6VARqCnKv9ZY0jvalvXg7ff3PLJ26bNbZEYY1u/u6II5XgJoeUP0im
 3kPZihu1ZxT0vCDPOFsH1l4XUyVDhD7G36kQl9uq2stD1/N7t8uXMlObymL4jUCE
 LNUBaHxyOZSzdGHtPmDAZpyUrz+VZTOJmz5HFDQVHvV+JSLcy4qsQsxTOjJCTe0h
 TDEko4XmOBPfbjIfo9y+gAR1caD5F1EsOtS3OjjZWTLHPmHGpqQ3fBoWch0kyW7H
 8RSEpxnVwxJCiBoazYdPpWuHiYk95lNlwdyhAPZAPLJmQm9CrpZsOFFEvIkuafVf
 K+zGvXEkrvJBDTCA3i3GbX+tuIdNjrTKneL1QqmK1bHlyrAUP1Kd5d1zmZh3AY0X
 mwiHSaNId0NZDkGgEWxdOHDZL8Ln+aaYMFqz+ebc7kuaL+IN18goKSxLwwgcSELN
 S6i1nr07r0HyLoFyz/KHoA4ormWJgLe/3Z7trxZ/Ic4An/5HAOFH/N3WyWOhpSYb
 jno71gz/XRjVCHBFLruc9bR3VrKhSDEL+WixIQsUNajOAkgQia8NwpwJGC4Nji1z
 GPmCaa8Rs3CL4FdjEvcY8zAnMdZlrXe7QCA+fWmjGT51jfdJLh+nES98wGs2HmWw
 uuIjvBPwv+BtT7k09j3H3rnEJ8i9IxBCHWlLih0KVGpUpGYtfno=
 =2JAV
 -----END PGP SIGNATURE-----

Merge tag 'renesas-fixes-for-v7.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes

Renesas fixes for v7.3

  - Fix Ethernet stalls on RZ/V2H, RZ/V2N, RZ/G3E, RZ/T2H, and RZ/N2H.

* tag 'renesas-fixes-for-v7.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: r9a09g087: Switch GBETH TX queue scheduling to WRR
  arm64: dts: renesas: r9a09g077: Switch GBETH TX queue scheduling to WRR
  arm64: dts: renesas: r9a09g047: Switch GBETH TX queue scheduling to WRR
  arm64: dts: renesas: r9a09g056: Switch GBETH TX queue scheduling to WRR
  arm64: dts: renesas: r9a09g057: Switch GBETH TX queue scheduling to WRR

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2026-09-14 17:01:55 +02:00
commit 2d5adffc11
5 changed files with 84 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm64/boot/dts/renesas/r9a09g047.dtsi
View File

@ -1913,23 +1913,28 @@ queue3 {
mtl_tx_setup0: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
snps,priority = <0x1>;
};
queue1 {
snps,weight = <0x12>;
snps,dcb-algorithm;
snps,priority = <0x2>;
};
queue2 {
snps,weight = <0x14>;
snps,dcb-algorithm;
snps,priority = <0x4>;
};
queue3 {
snps,weight = <0x18>;
snps,dcb-algorithm;
snps,priority = <0x8>;
};
@ -2013,23 +2018,28 @@ queue3 {
mtl_tx_setup1: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
snps,priority = <0x1>;
};
queue1 {
snps,weight = <0x12>;
snps,dcb-algorithm;
snps,priority = <0x2>;
};
queue2 {
snps,weight = <0x14>;
snps,dcb-algorithm;
snps,priority = <0x4>;
};
queue3 {
snps,weight = <0x18>;
snps,dcb-algorithm;
snps,priority = <0x8>;
};

10
arch/arm64/boot/dts/renesas/r9a09g056.dtsi
View File

@ -1585,23 +1585,28 @@ queue3 {
mtl_tx_setup0: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
snps,priority = <0x1>;
};
queue1 {
snps,weight = <0x12>;
snps,dcb-algorithm;
snps,priority = <0x2>;
};
queue2 {
snps,weight = <0x14>;
snps,dcb-algorithm;
snps,priority = <0x4>;
};
queue3 {
snps,weight = <0x18>;
snps,dcb-algorithm;
snps,priority = <0x8>;
};
@ -1686,23 +1691,28 @@ queue3 {
mtl_tx_setup1: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
snps,priority = <0x1>;
};
queue1 {
snps,weight = <0x12>;
snps,dcb-algorithm;
snps,priority = <0x2>;
};
queue2 {
snps,weight = <0x14>;
snps,dcb-algorithm;
snps,priority = <0x4>;
};
queue3 {
snps,weight = <0x18>;
snps,dcb-algorithm;
snps,priority = <0x8>;
};

10
arch/arm64/boot/dts/renesas/r9a09g057.dtsi
View File

@ -1715,23 +1715,28 @@ queue3 {
mtl_tx_setup0: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
snps,priority = <0x1>;
};
queue1 {
snps,weight = <0x12>;
snps,dcb-algorithm;
snps,priority = <0x2>;
};
queue2 {
snps,weight = <0x14>;
snps,dcb-algorithm;
snps,priority = <0x4>;
};
queue3 {
snps,weight = <0x18>;
snps,dcb-algorithm;
snps,priority = <0x8>;
};
@ -1816,23 +1821,28 @@ queue3 {
mtl_tx_setup1: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
snps,priority = <0x1>;
};
queue1 {
snps,weight = <0x12>;
snps,dcb-algorithm;
snps,priority = <0x2>;
};
queue2 {
snps,weight = <0x14>;
snps,dcb-algorithm;
snps,priority = <0x4>;
};
queue3 {
snps,weight = <0x18>;
snps,dcb-algorithm;
snps,priority = <0x8>;
};

27
arch/arm64/boot/dts/renesas/r9a09g077.dtsi
View File

@ -642,36 +642,45 @@ queue7 {
mtl_tx_setup0: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x11>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x12>;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x13>;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x14>;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x15>;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x16>;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x17>;
snps,dcb-algorithm;
};
};
@ -788,36 +797,45 @@ queue7 {
mtl_tx_setup1: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x11>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x12>;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x13>;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x14>;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x15>;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x16>;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x17>;
snps,dcb-algorithm;
};
};
@ -934,36 +952,45 @@ queue7 {
mtl_tx_setup2: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x11>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x12>;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x13>;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x14>;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x15>;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x16>;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x17>;
snps,dcb-algorithm;
};
};

27
arch/arm64/boot/dts/renesas/r9a09g087.dtsi
View File

@ -643,36 +643,45 @@ queue7 {
mtl_tx_setup0: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x11>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x12>;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x13>;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x14>;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x15>;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x16>;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x17>;
snps,dcb-algorithm;
};
};
@ -790,36 +799,45 @@ queue7 {
mtl_tx_setup1: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x11>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x12>;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x13>;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x14>;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x15>;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x16>;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x17>;
snps,dcb-algorithm;
};
};
@ -937,36 +955,45 @@ queue7 {
mtl_tx_setup2: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x11>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x12>;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x13>;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x14>;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x15>;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x16>;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x17>;
snps,dcb-algorithm;
};
};