ASoC: codecs: More const and unused member cleanups

Merge series from Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>:

Make static data const for code safety and drop some unused fields in
structs.
This commit is contained in:
Mark Brown 2025-06-09 16:45:26 +01:00
commit 2ccb770828
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GPG Key ID: 24D68B725D5487D0
24 changed files with 31 additions and 43 deletions

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@ -129,7 +129,7 @@ static const struct cs35l36_pll_config cs35l36_pll_sysclk[] = {
{27000000, 0x3F, 0x0A},
};
static struct reg_default cs35l36_reg[] = {
static const struct reg_default cs35l36_reg[] = {
{CS35L36_TESTKEY_CTRL, 0x00000000},
{CS35L36_USERKEY_CTL, 0x00000000},
{CS35L36_OTP_CTRL1, 0x00002460},

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@ -3033,7 +3033,7 @@ static const struct snd_soc_component_driver soc_component_dev_da7218 = {
* Regmap configs
*/
static struct reg_default da7218_reg_defaults[] = {
static const struct reg_default da7218_reg_defaults[] = {
{ DA7218_SYSTEM_ACTIVE, 0x00 },
{ DA7218_CIF_CTRL, 0x00 },
{ DA7218_SPARE1, 0x00 },

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@ -2312,7 +2312,7 @@ static void da7219_handle_pdata(struct snd_soc_component *component)
* Regmap configs
*/
static struct reg_default da7219_reg_defaults[] = {
static const struct reg_default da7219_reg_defaults[] = {
{ DA7219_MIC_1_SELECT, 0x00 },
{ DA7219_CIF_TIMEOUT_CTRL, 0x01 },
{ DA7219_SR_24_48, 0x00 },
@ -2443,7 +2443,7 @@ static const struct regmap_config da7219_regmap_config = {
.cache_type = REGCACHE_RBTREE,
};
static struct reg_sequence da7219_rev_aa_patch[] = {
static const struct reg_sequence da7219_rev_aa_patch[] = {
{ DA7219_REFERENCES, 0x08 },
};

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@ -620,7 +620,7 @@ static bool es8375_writeable_register(struct device *dev, unsigned int reg)
}
}
static struct regmap_config es8375_regmap_config = {
static const struct regmap_config es8375_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = ES8375_REG_MAX,

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@ -14,7 +14,7 @@
#include "max98363.h"
static struct reg_default max98363_reg[] = {
static const struct reg_default max98363_reg[] = {
{MAX98363_R2021_ERR_MON_CTRL, 0x0},
{MAX98363_R2022_SPK_MON_THRESH, 0x0},
{MAX98363_R2023_SPK_MON_DURATION, 0x0},

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@ -23,7 +23,7 @@ static const u32 max98373_i2c_cache_reg[] = {
MAX98373_R20B6_BDE_CUR_STATE_READBACK,
};
static struct reg_default max98373_reg[] = {
static const struct reg_default max98373_reg[] = {
{MAX98373_R2000_SW_RESET, 0x00},
{MAX98373_R2001_INT_RAW1, 0x00},
{MAX98373_R2002_INT_RAW2, 0x00},

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@ -26,7 +26,7 @@ static const u32 max98373_sdw_cache_reg[] = {
MAX98373_R20B6_BDE_CUR_STATE_READBACK,
};
static struct reg_default max98373_reg[] = {
static const struct reg_default max98373_reg[] = {
{MAX98373_R0040_SCP_INIT_STAT_1, 0x00},
{MAX98373_R0041_SCP_INIT_MASK_1, 0x00},
{MAX98373_R0042_SCP_INIT_STAT_2, 0x00},

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@ -18,7 +18,7 @@
#include <sound/tlv.h>
#include "max98388.h"
static struct reg_default max98388_reg[] = {
static const struct reg_default max98388_reg[] = {
{MAX98388_R2000_SW_RESET, 0x00},
{MAX98388_R2001_INT_RAW1, 0x00},
{MAX98388_R2002_INT_RAW2, 0x00},

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@ -23,7 +23,7 @@
#include "max98390.h"
static struct reg_default max98390_reg_defaults[] = {
static const struct reg_default max98390_reg_defaults[] = {
{MAX98390_INT_EN1, 0xf0},
{MAX98390_INT_EN2, 0x00},
{MAX98390_INT_EN3, 0x00},

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@ -16,7 +16,7 @@ static const char * const max98396_core_supplies[MAX98396_NUM_CORE_SUPPLIES] = {
"dvddio",
};
static struct reg_default max98396_reg[] = {
static const struct reg_default max98396_reg[] = {
{MAX98396_R2000_SW_RESET, 0x00},
{MAX98396_R2001_INT_RAW1, 0x00},
{MAX98396_R2002_INT_RAW2, 0x00},
@ -174,7 +174,7 @@ static struct reg_default max98396_reg[] = {
{MAX98396_R21FF_REVISION_ID, 0x00},
};
static struct reg_default max98397_reg[] = {
static const struct reg_default max98397_reg[] = {
{MAX98396_R2000_SW_RESET, 0x00},
{MAX98396_R2001_INT_RAW1, 0x00},
{MAX98396_R2002_INT_RAW2, 0x00},

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@ -35,7 +35,7 @@ struct max98504_priv {
unsigned int brownout_release_rate;
};
static struct reg_default max98504_reg_defaults[] = {
static const struct reg_default max98504_reg_defaults[] = {
{ 0x01, 0},
{ 0x02, 0},
{ 0x03, 0},

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@ -16,7 +16,7 @@
#include <sound/tlv.h>
#include "max98520.h"
static struct reg_default max98520_reg[] = {
static const struct reg_default max98520_reg[] = {
{MAX98520_R2000_SW_RESET, 0x00},
{MAX98520_R2001_STATUS_1, 0x00},
{MAX98520_R2002_STATUS_2, 0x00},

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@ -19,7 +19,7 @@
#include <sound/tlv.h>
#include "max98927.h"
static struct reg_default max98927_reg[] = {
static const struct reg_default max98927_reg[] = {
{MAX98927_R0001_INT_RAW1, 0x00},
{MAX98927_R0002_INT_RAW2, 0x00},
{MAX98927_R0003_INT_RAW3, 0x00},

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@ -147,7 +147,7 @@ static int rt722_sdca_mbq_size(struct device *dev, unsigned int reg)
}
}
static struct regmap_sdw_mbq_cfg rt722_mbq_config = {
static const struct regmap_sdw_mbq_cfg rt722_mbq_config = {
.mbq_size = rt722_sdca_mbq_size,
};

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@ -312,7 +312,6 @@ struct wcd9335_codec {
u32 num_rx_port;
u32 num_tx_port;
int sido_input_src;
enum wcd9335_sido_voltage sido_voltage;
struct wcd_slim_codec_dai_data dai[NUM_CODEC_DAIS];
@ -4725,8 +4724,6 @@ static const struct snd_soc_dapm_widget wcd9335_dapm_widgets[] = {
static void wcd9335_enable_sido_buck(struct snd_soc_component *component)
{
struct wcd9335_codec *wcd = dev_get_drvdata(component->dev);
snd_soc_component_update_bits(component, WCD9335_ANA_RCO,
WCD9335_ANA_RCO_BG_EN_MASK,
WCD9335_ANA_RCO_BG_ENABLE);
@ -4740,7 +4737,6 @@ static void wcd9335_enable_sido_buck(struct snd_soc_component *component)
WCD9335_ANA_BUCK_CTL_VOUT_D_VREF_EXT);
/* 100us sleep needed after VREF settings */
usleep_range(100, 110);
wcd->sido_input_src = SIDO_SOURCE_RCO_BG;
}
static int wcd9335_enable_efuse_sensing(struct snd_soc_component *comp)
@ -4871,7 +4867,6 @@ static int wcd9335_probe(struct wcd9335_codec *wcd)
memcpy(wcd->rx_chs, wcd9335_rx_chs, sizeof(wcd9335_rx_chs));
memcpy(wcd->tx_chs, wcd9335_tx_chs, sizeof(wcd9335_tx_chs));
wcd->sido_input_src = SIDO_SOURCE_INTERNAL;
wcd->sido_voltage = SIDO_VOLTAGE_NOMINAL_MV;
return devm_snd_soc_register_component(dev, &wcd9335_component_drv,

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@ -537,8 +537,6 @@ struct wcd934x_codec {
int rate;
u32 version;
u32 hph_mode;
int num_rx_port;
int num_tx_port;
u32 tx_port_value[WCD934X_TX_MAX];
u32 rx_port_value[WCD934X_RX_MAX];
int sido_input_src;
@ -1928,13 +1926,11 @@ static int wcd934x_set_channel_map(struct snd_soc_dai *dai,
return -EINVAL;
}
wcd->num_rx_port = rx_num;
for (i = 0; i < rx_num; i++) {
wcd->rx_chs[i].ch_num = rx_slot[i];
INIT_LIST_HEAD(&wcd->rx_chs[i].list);
}
wcd->num_tx_port = tx_num;
for (i = 0; i < tx_num; i++) {
wcd->tx_chs[i].ch_num = tx_slot[i];
INIT_LIST_HEAD(&wcd->tx_chs[i].list);

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@ -88,7 +88,6 @@ struct wcd937x_priv {
struct wcd_mbhc_intr intr_ids;
struct wcd_clsh_ctrl *clsh_info;
struct irq_domain *virq;
struct regmap_irq_chip *wcd_regmap_irq_chip;
struct regmap_irq_chip_data *irq_chip;
struct snd_soc_jack *jack;
unsigned long status_mask;

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@ -158,7 +158,6 @@ struct wcd938x_priv {
struct wcd_mbhc_intr intr_ids;
struct wcd_clsh_ctrl *clsh_info;
struct irq_domain *virq;
struct regmap_irq_chip *wcd_regmap_irq_chip;
struct regmap_irq_chip_data *irq_chip;
struct snd_soc_jack *jack;
unsigned long status_mask;
@ -168,7 +167,6 @@ struct wcd938x_priv {
u32 tx_mode[TX_ADC_MAX];
int flyback_cur_det_disable;
int ear_rx_path;
int variant;
struct gpio_desc *reset_gpio;
struct gpio_desc *us_euro_gpio;
struct mux_control *us_euro_mux;
@ -277,7 +275,7 @@ static const struct regmap_irq wcd938x_irqs[WCD938X_NUM_IRQS] = {
REGMAP_IRQ_REG(WCD938X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
};
static struct regmap_irq_chip wcd938x_regmap_irq_chip = {
static const struct regmap_irq_chip wcd938x_regmap_irq_chip = {
.name = "wcd938x",
.irqs = wcd938x_irqs,
.num_irqs = ARRAY_SIZE(wcd938x_irqs),
@ -3048,6 +3046,7 @@ static int wcd938x_soc_codec_probe(struct snd_soc_component *component)
struct sdw_slave *tx_sdw_dev = wcd938x->tx_sdw_dev;
struct device *dev = component->dev;
unsigned long time_left;
unsigned int variant;
int ret, i;
time_left = wait_for_completion_timeout(&tx_sdw_dev->initialization_complete,
@ -3063,9 +3062,9 @@ static int wcd938x_soc_codec_probe(struct snd_soc_component *component)
if (ret < 0)
return ret;
wcd938x->variant = snd_soc_component_read_field(component,
WCD938X_DIGITAL_EFUSE_REG_0,
WCD938X_ID_MASK);
variant = snd_soc_component_read_field(component,
WCD938X_DIGITAL_EFUSE_REG_0,
WCD938X_ID_MASK);
wcd938x->clsh_info = wcd_clsh_ctrl_alloc(component, WCD938X);
if (IS_ERR(wcd938x->clsh_info)) {
@ -3119,14 +3118,14 @@ static int wcd938x_soc_codec_probe(struct snd_soc_component *component)
disable_irq_nosync(wcd938x->hphl_pdm_wd_int);
disable_irq_nosync(wcd938x->aux_pdm_wd_int);
switch (wcd938x->variant) {
switch (variant) {
case WCD9380:
ret = snd_soc_add_component_controls(component, wcd9380_snd_controls,
ARRAY_SIZE(wcd9380_snd_controls));
if (ret < 0) {
dev_err(component->dev,
"%s: Failed to add snd ctrls for variant: %d\n",
__func__, wcd938x->variant);
__func__, variant);
goto err_free_aux_pdm_wd_int;
}
break;
@ -3136,7 +3135,7 @@ static int wcd938x_soc_codec_probe(struct snd_soc_component *component)
if (ret < 0) {
dev_err(component->dev,
"%s: Failed to add snd ctrls for variant: %d\n",
__func__, wcd938x->variant);
__func__, variant);
goto err_free_aux_pdm_wd_int;
}
break;

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@ -189,7 +189,6 @@ struct wcd939x_priv {
struct wcd_mbhc_intr intr_ids;
struct wcd_clsh_ctrl *clsh_info;
struct irq_domain *virq;
struct regmap_irq_chip *wcd_regmap_irq_chip;
struct regmap_irq_chip_data *irq_chip;
struct snd_soc_jack *jack;
unsigned long status_mask;

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@ -202,7 +202,7 @@
SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \
snd_soc_get_volsw, wsa881x_put_pa_gain, tlv_array)
static struct reg_default wsa881x_defaults[] = {
static const struct reg_default wsa881x_defaults[] = {
{ WSA881X_CHIP_ID0, 0x00 },
{ WSA881X_CHIP_ID1, 0x00 },
{ WSA881X_CHIP_ID2, 0x00 },
@ -346,7 +346,7 @@ static const struct reg_sequence wsa881x_vi_txfe_en_2_0[] = {
};
/* Default register reset values for WSA881x rev 2.0 */
static struct reg_sequence wsa881x_rev_2_0[] = {
static const struct reg_sequence wsa881x_rev_2_0[] = {
{ WSA881X_RESET_CTL, 0x00, 0x00 },
{ WSA881X_TADC_VALUE_CTL, 0x01, 0x00 },
{ WSA881X_INTR_MASK, 0x1B, 0x00 },

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@ -572,7 +572,7 @@ static const struct sdw_port_config wsa883x_pconfig[WSA883X_MAX_SWR_PORTS] = {
},
};
static struct reg_default wsa883x_defaults[] = {
static const struct reg_default wsa883x_defaults[] = {
{ WSA883X_REF_CTRL, 0xD5 },
{ WSA883X_TEST_CTL_0, 0x06 },
{ WSA883X_BIAS_0, 0xD2 },

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@ -899,7 +899,7 @@ static const struct sdw_port_config wsa884x_pconfig[WSA884X_MAX_SWR_PORTS] = {
},
};
static struct reg_default wsa884x_defaults[] = {
static const struct reg_default wsa884x_defaults[] = {
{ WSA884X_BG_CTRL, 0xa5 },
{ WSA884X_ADC_CTRL, 0x00 },
{ WSA884X_BOP1_PROG, 0x22 },

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@ -930,7 +930,7 @@ static bool fsl_asrc_writeable_reg(struct device *dev, unsigned int reg)
}
}
static struct reg_default fsl_asrc_reg[] = {
static const struct reg_default fsl_asrc_reg[] = {
{ REG_ASRCTR, 0x0000 }, { REG_ASRIER, 0x0000 },
{ REG_ASRCNCR, 0x0000 }, { REG_ASRCFG, 0x0000 },
{ REG_ASRCSR, 0x0000 }, { REG_ASRCDR1, 0x0000 },

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@ -1059,7 +1059,7 @@ static const struct snd_soc_component_driver fsl_component = {
.legacy_dai_naming = 1,
};
static struct reg_default fsl_sai_reg_defaults_ofs0[] = {
static const struct reg_default fsl_sai_reg_defaults_ofs0[] = {
{FSL_SAI_TCR1(0), 0},
{FSL_SAI_TCR2(0), 0},
{FSL_SAI_TCR3(0), 0},
@ -1082,7 +1082,7 @@ static struct reg_default fsl_sai_reg_defaults_ofs0[] = {
{FSL_SAI_RMR, 0},
};
static struct reg_default fsl_sai_reg_defaults_ofs8[] = {
static const struct reg_default fsl_sai_reg_defaults_ofs8[] = {
{FSL_SAI_TCR1(8), 0},
{FSL_SAI_TCR2(8), 0},
{FSL_SAI_TCR3(8), 0},