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KVM: Move x86-only tracepoints to x86's trace.h
Move the I/O APIC tracepoints and trace_kvm_msi_set_irq() to x86, as __KVM_HAVE_IOAPIC is just code for "x86", and trace_kvm_msi_set_irq() isn't unique to I/O APIC emulation. Opportunistically clean up the absurdly messy #includes in ioapic.c. No functional change intended. Acked-by: Kai Huang <kai.huang@intel.com> Link: https://lore.kernel.org/r/20250611213557.294358-14-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
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cd9140ad83
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@ -41,11 +41,11 @@
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#include <asm/processor.h>
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#include <asm/page.h>
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#include <asm/current.h>
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#include <trace/events/kvm.h>
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#include "ioapic.h"
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#include "lapic.h"
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#include "irq.h"
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#include "trace.h"
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static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
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bool line_status);
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@ -15,15 +15,11 @@
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#include <linux/export.h>
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#include <linux/rculist.h>
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#include <trace/events/kvm.h>
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#include "irq.h"
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#include "ioapic.h"
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#include "lapic.h"
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#include "hyperv.h"
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#include "ioapic.h"
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#include "irq.h"
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#include "lapic.h"
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#include "trace.h"
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#include "x86.h"
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#include "xen.h"
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@ -260,6 +260,84 @@ TRACE_EVENT(kvm_cpuid,
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__entry->used_max_basic ? ", used max basic" : "")
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);
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#define kvm_deliver_mode \
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{0x0, "Fixed"}, \
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{0x1, "LowPrio"}, \
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{0x2, "SMI"}, \
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{0x3, "Res3"}, \
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{0x4, "NMI"}, \
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{0x5, "INIT"}, \
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{0x6, "SIPI"}, \
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{0x7, "ExtINT"}
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TRACE_EVENT(kvm_ioapic_set_irq,
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TP_PROTO(__u64 e, int pin, bool coalesced),
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TP_ARGS(e, pin, coalesced),
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TP_STRUCT__entry(
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__field( __u64, e )
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__field( int, pin )
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__field( bool, coalesced )
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),
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TP_fast_assign(
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__entry->e = e;
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__entry->pin = pin;
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__entry->coalesced = coalesced;
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),
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TP_printk("pin %u dst %x vec %u (%s|%s|%s%s)%s",
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__entry->pin, (u8)(__entry->e >> 56), (u8)__entry->e,
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__print_symbolic((__entry->e >> 8 & 0x7), kvm_deliver_mode),
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(__entry->e & (1<<11)) ? "logical" : "physical",
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(__entry->e & (1<<15)) ? "level" : "edge",
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(__entry->e & (1<<16)) ? "|masked" : "",
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__entry->coalesced ? " (coalesced)" : "")
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);
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TRACE_EVENT(kvm_ioapic_delayed_eoi_inj,
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TP_PROTO(__u64 e),
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TP_ARGS(e),
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TP_STRUCT__entry(
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__field( __u64, e )
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),
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TP_fast_assign(
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__entry->e = e;
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),
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TP_printk("dst %x vec %u (%s|%s|%s%s)",
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(u8)(__entry->e >> 56), (u8)__entry->e,
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__print_symbolic((__entry->e >> 8 & 0x7), kvm_deliver_mode),
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(__entry->e & (1<<11)) ? "logical" : "physical",
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(__entry->e & (1<<15)) ? "level" : "edge",
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(__entry->e & (1<<16)) ? "|masked" : "")
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);
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TRACE_EVENT(kvm_msi_set_irq,
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TP_PROTO(__u64 address, __u64 data),
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TP_ARGS(address, data),
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TP_STRUCT__entry(
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__field( __u64, address )
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__field( __u64, data )
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),
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TP_fast_assign(
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__entry->address = address;
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__entry->data = data;
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),
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TP_printk("dst %llx vec %u (%s|%s|%s%s)",
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(u8)(__entry->address >> 12) | ((__entry->address >> 32) & 0xffffff00),
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(u8)__entry->data,
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__print_symbolic((__entry->data >> 8 & 0x7), kvm_deliver_mode),
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(__entry->address & (1<<2)) ? "logical" : "physical",
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(__entry->data & (1<<15)) ? "level" : "edge",
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(__entry->address & (1<<3)) ? "|rh" : "")
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);
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#define AREG(x) { APIC_##x, "APIC_" #x }
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#define kvm_trace_symbol_apic \
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@ -85,83 +85,6 @@ TRACE_EVENT(kvm_set_irq,
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#endif /* defined(CONFIG_HAVE_KVM_IRQCHIP) */
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#if defined(__KVM_HAVE_IOAPIC)
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#define kvm_deliver_mode \
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{0x0, "Fixed"}, \
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{0x1, "LowPrio"}, \
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{0x2, "SMI"}, \
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{0x3, "Res3"}, \
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{0x4, "NMI"}, \
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{0x5, "INIT"}, \
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{0x6, "SIPI"}, \
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{0x7, "ExtINT"}
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TRACE_EVENT(kvm_ioapic_set_irq,
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TP_PROTO(__u64 e, int pin, bool coalesced),
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TP_ARGS(e, pin, coalesced),
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TP_STRUCT__entry(
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__field( __u64, e )
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__field( int, pin )
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__field( bool, coalesced )
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),
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TP_fast_assign(
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__entry->e = e;
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__entry->pin = pin;
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__entry->coalesced = coalesced;
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),
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TP_printk("pin %u dst %x vec %u (%s|%s|%s%s)%s",
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__entry->pin, (u8)(__entry->e >> 56), (u8)__entry->e,
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__print_symbolic((__entry->e >> 8 & 0x7), kvm_deliver_mode),
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(__entry->e & (1<<11)) ? "logical" : "physical",
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(__entry->e & (1<<15)) ? "level" : "edge",
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(__entry->e & (1<<16)) ? "|masked" : "",
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__entry->coalesced ? " (coalesced)" : "")
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);
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TRACE_EVENT(kvm_ioapic_delayed_eoi_inj,
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TP_PROTO(__u64 e),
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TP_ARGS(e),
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TP_STRUCT__entry(
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__field( __u64, e )
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),
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TP_fast_assign(
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__entry->e = e;
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),
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TP_printk("dst %x vec %u (%s|%s|%s%s)",
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(u8)(__entry->e >> 56), (u8)__entry->e,
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__print_symbolic((__entry->e >> 8 & 0x7), kvm_deliver_mode),
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(__entry->e & (1<<11)) ? "logical" : "physical",
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(__entry->e & (1<<15)) ? "level" : "edge",
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(__entry->e & (1<<16)) ? "|masked" : "")
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);
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TRACE_EVENT(kvm_msi_set_irq,
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TP_PROTO(__u64 address, __u64 data),
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TP_ARGS(address, data),
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TP_STRUCT__entry(
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__field( __u64, address )
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__field( __u64, data )
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),
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TP_fast_assign(
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__entry->address = address;
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__entry->data = data;
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),
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TP_printk("dst %llx vec %u (%s|%s|%s%s)",
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(u8)(__entry->address >> 12) | ((__entry->address >> 32) & 0xffffff00),
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(u8)__entry->data,
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__print_symbolic((__entry->data >> 8 & 0x7), kvm_deliver_mode),
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(__entry->address & (1<<2)) ? "logical" : "physical",
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(__entry->data & (1<<15)) ? "level" : "edge",
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(__entry->address & (1<<3)) ? "|rh" : "")
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);
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#define kvm_irqchips \
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{KVM_IRQCHIP_PIC_MASTER, "PIC master"}, \
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