From 2c3e4e818c9cc9b41146b660bfe72a5a3eea207d Mon Sep 17 00:00:00 2001 From: Luca Leonardo Scorcia Date: Tue, 8 Sep 2026 19:38:30 +0200 Subject: [PATCH] dt-bindings: watchdog: Add compatible for MediaTek mt8167 Currently mt8167 inherits its watchdog from the included mt8516 dtsi, which in turn falls back on mt6589-wdt. However according to the data sheet mt8167 toprgu is not actually compatible with mt6589 (it has 14 sw resets instead of 12, and its reset bit map table is different from mt6589). Update the mtk-wdt binding to add a dedicated compatible for mt8167 and add the IDs that can be used in device trees to identify subsystem resets. Signed-off-by: Luca Leonardo Scorcia Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260908174259.9009-4-l.scorcia@gmail.com Signed-off-by: Guenter Roeck --- .../bindings/watchdog/mediatek,mtk-wdt.yaml | 1 + .../dt-bindings/reset/mediatek,mt8167-wdt.h | 21 +++++++++++++++++++ 2 files changed, 22 insertions(+) create mode 100644 include/dt-bindings/reset/mediatek,mt8167-wdt.h diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml index e6e4546da0aa..f9b725592c27 100644 --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml @@ -26,6 +26,7 @@ properties: - mediatek,mt6795-wdt - mediatek,mt7986-wdt - mediatek,mt7988-wdt + - mediatek,mt8167-wdt - mediatek,mt8183-wdt - mediatek,mt8186-wdt - mediatek,mt8188-wdt diff --git a/include/dt-bindings/reset/mediatek,mt8167-wdt.h b/include/dt-bindings/reset/mediatek,mt8167-wdt.h new file mode 100644 index 000000000000..1a24bfe079ca --- /dev/null +++ b/include/dt-bindings/reset/mediatek,mt8167-wdt.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ +#ifndef _DT_BINDINGS_RESET_MEDIATEK_MT8167_WDT_H_ +#define _DT_BINDINGS_RESET_MEDIATEK_MT8167_WDT_H_ + +/* TOPRGU reset IDs */ +#define MT8167_TOPRGU_DDRPHY_FLASH_RST 0 +#define MT8167_TOPRGU_AUD_PAD_RST 1 +#define MT8167_TOPRGU_MM_RST 2 +#define MT8167_TOPRGU_MFG_RST 3 +#define MT8167_TOPRGU_MDSYS_RST 4 +#define MT8167_TOPRGU_CONN_RST 5 +#define MT8167_TOPRGU_PAD2CAM_DIG_MIPI_RX_RST 6 +#define MT8167_TOPRGU_DIG_MIPI_TX_RST 7 +#define MT8167_TOPRGU_SPI_PAD_MACRO_RST 8 +#define MT8167_TOPRGU_APMIXED_RST 9 +#define MT8167_TOPRGU_VDEC_RST 10 +#define MT8167_TOPRGU_CONN_MCU_RST 11 +#define MT8167_TOPRGU_EFUSE_RST 12 +#define MT8167_TOPRGU_PWRAP_SPICTL_RST 13 + +#endif /* _DT_BINDINGS_RESET_MEDIATEK_MT8167_WDT_H_ */