From dbb93129482f0c7f85b00f748d7d92b42a05afe4 Mon Sep 17 00:00:00 2001 From: Xubin Bai Date: Tue, 8 Nov 2022 18:40:59 -0800 Subject: [PATCH 1/2] dt-bindings: clock: Add VIDEO_CC_XO_CLK_ARES for Pineapple Add CLK_ARES for VIDEO_CC_XO_CLK to ensure video power collapse can work fine in Pineapple. Change-Id: Id76e3ef29f59f5745469cd43800cefc0d82f8499 Signed-off-by: Xubin Bai --- include/dt-bindings/clock/qcom,videocc-pineapple.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/qcom,videocc-pineapple.h b/include/dt-bindings/clock/qcom,videocc-pineapple.h index 25af039f8150..6f0f1cec804b 100644 --- a/include/dt-bindings/clock/qcom,videocc-pineapple.h +++ b/include/dt-bindings/clock/qcom,videocc-pineapple.h @@ -38,5 +38,6 @@ #define VCODEC_VIDEO_CC_MVS1_BCR 4 #define VIDEO_CC_MVS1C_CLK_ARES 5 #define VCODEC_VIDEO_CC_MVS1C_BCR 6 +#define VIDEO_CC_XO_CLK_ARES 7 #endif From f4bf0d795c2e3f3a4d091fead9ffb96f2b9a9ac0 Mon Sep 17 00:00:00 2001 From: Xubin Bai Date: Tue, 8 Nov 2022 18:48:51 -0800 Subject: [PATCH 2/2] clk: qcom: videocc-pineapple: Add VIDEO_CC_XO_CLK_ARES In order to ensure video power collapse can work fine, the CLK_ARES is added for VIDEO_CC_XO_CLK so that asserting/de-asserting the reset can automatically disable/enable the clock. Change-Id: Ibf20a768d95aa0394ebec1c8be163a0fa4d85754 Signed-off-by: Xubin Bai --- drivers/clk/qcom/videocc-pineapple.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/videocc-pineapple.c b/drivers/clk/qcom/videocc-pineapple.c index 88b09c4382b7..e2a246253ba2 100644 --- a/drivers/clk/qcom/videocc-pineapple.c +++ b/drivers/clk/qcom/videocc-pineapple.c @@ -571,6 +571,7 @@ static const struct qcom_reset_map video_cc_pineapple_resets[] = { [VCODEC_VIDEO_CC_MVS1_BCR] = { 0x80c8 }, [VIDEO_CC_MVS1C_CLK_ARES] = { 0x8090, 2 }, [VCODEC_VIDEO_CC_MVS1C_BCR] = { 0x8074 }, + [VIDEO_CC_XO_CLK_ARES] = { 0x8124, 2 }, }; static const struct regmap_config video_cc_pineapple_regmap_config = {