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Allwinner Device Tree Changes for 7.1 - Part 2

Browse Source 
UART DMA channels added for A64 and H6. Standard resolution MMIO timer added
 for H616. This timer can be used as a broadcast timer for wakeup from idle
 states.
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Merge tag 'sunxi-dt-for-7.1-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt

Allwinner Device Tree Changes for 7.1 - Part 2

UART DMA channels added for A64 and H6. Standard resolution MMIO timer added
for H616. This timer can be used as a broadcast timer for wakeup from idle
states.

* tag 'sunxi-dt-for-7.1-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: enable h616 timer support
  arm64: dts: allwinner: sun50i-h6: add UART DMA channels
  arm64: dts: allwinner: sun50i-a64: add UART DMA channels

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Krzysztof Kozlowski 2026-04-11 10:42:27 +02:00
commit 2bb665a217
3 changed files with 27 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
View File

@ -1000,6 +1000,8 @@ uart0: serial@1c28000 {
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART0>;
resets = <&ccu RST_BUS_UART0>;
dmas = <&dma 6>, <&dma 6>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1011,6 +1013,8 @@ uart1: serial@1c28400 {
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART1>;
resets = <&ccu RST_BUS_UART1>;
dmas = <&dma 7>, <&dma 7>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1022,6 +1026,8 @@ uart2: serial@1c28800 {
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART2>;
resets = <&ccu RST_BUS_UART2>;
dmas = <&dma 8>, <&dma 8>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1033,6 +1039,8 @@ uart3: serial@1c28c00 {
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART3>;
resets = <&ccu RST_BUS_UART3>;
dmas = <&dma 9>, <&dma 9>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1044,6 +1052,8 @@ uart4: serial@1c29000 {
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART4>;
resets = <&ccu RST_BUS_UART4>;
dmas = <&dma 10>, <&dma 10>;
dma-names = "tx", "rx";
status = "disabled";
};

8
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
View File

@ -540,6 +540,8 @@ uart0: serial@5000000 {
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART0>;
resets = <&ccu RST_BUS_UART0>;
dmas = <&dma 14>, <&dma 14>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -551,6 +553,8 @@ uart1: serial@5000400 {
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART1>;
resets = <&ccu RST_BUS_UART1>;
dmas = <&dma 15>, <&dma 15>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -562,6 +566,8 @@ uart2: serial@5000800 {
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART2>;
resets = <&ccu RST_BUS_UART2>;
dmas = <&dma 16>, <&dma 16>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -573,6 +579,8 @@ uart3: serial@5000c00 {
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART3>;
resets = <&ccu RST_BUS_UART3>;
dmas = <&dma 17>, <&dma 17>;
dma-names = "tx", "rx";
status = "disabled";
};

9
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
View File

@ -228,6 +228,15 @@ cpu_speed_grade: cpu-speed-grade@0 {
};
};
timer0: timer@3009000 {
compatible = "allwinner,sun50i-h616-timer",
"allwinner,sun8i-a23-timer";
reg = <0x03009000 0xa0>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
};
watchdog: watchdog@30090a0 {
compatible = "allwinner,sun50i-h616-wdt",
"allwinner,sun6i-a31-wdt";