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STM32 DT for v6.14, round 1

Browse Source 
Highlights:
 ----------
 
 - MPU:
   - STM32MP13:
     - Populate all timer counter nodes in Soc file.
     - Enable counter (timers) on stm32mp135f-dk.
     - DH core: increase CPU voltage to fit with STM32MP135F datasheet.
 
   - STMP32MP15:
     - Populate all timer counter nodes in Soc file.
     - Enable counter (timers) on stm32mp15 EV1 and DK boards.
 
     - OCTAVO:
       - LXA-TAC (gen1/2): disable RTC, update aliases and
         adjust USB gadget.
       - Add LXA-TAC gen3 based on OSD32MP153x SIP:
         STMP32MP153, RAM, PMIC.
 
     - DH: minor fixes.
 
   - STM32MP25:
     - Enable imx335/CSI/DCMIPP pipeline on stm32mp257f-ev1.
     - Add I2S, SAI, SPDIFRX supports.
     - Add and enable COMBOPHY on stm32mp257f-ev1. Combophy is used
       by PCIe and USB3.
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmdlJtwdHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIUdFg/+KGM5tZcNZfxKSSIt
 0XBifd+j5NJjP6dxGAmhCoY87X6NYX8UjeNe3mshNgLaXVswEuTEIFiRsTC88neq
 ceHEwgrwXZN4jK5Mlj5/kTWRt7lsuv5EZ5k7ihsFRQAzFV0z9JDXWmMa61H+BE3v
 gV+Rqs2liBr+TbUj2j3viBNwmcEQrLqSodSjF4P9EdyNztuCTsEqEZrxWLFnXi6Q
 ds+YqAmF2K4y0lmsJ/1vX5uNcjbUQJRJPriRsRBFDqE1YuUjCfIXeuhMKWCNbm/J
 0F16eqLuzms/5vr0urrGdpTInOO0pQ1Zmto43NtpVAojqM84Km9aMq5tpQQ6zaLQ
 WUyxGe8GqkAirC6iDWLQ778m0zUrAwb7NBYoyngcg9biitgDqgO79FOcDnG7KR0g
 oyLiC9ctj6TB2T4RD+EDNxk/pxi5o7IRDhRHHnB01G/j6B7AgSO6ma83za8CKume
 RF1/p4xxx010wbQPpk/eSk9Qlpiz+y+Cjk9EHWu0qhFiBC8+dw7QHWvu6xI32mfB
 YDHTAk09vF1ZNmBoWvNMF9r8g3HBGwldR+/UHvxDTNqXWdKajf8KLgaaSvkzMkvN
 wGB7/JcrK2Z8F7rmezT8FNGfawnfpJh3fgKXBXy7IaBfDzZAlhM++8VGByN4QNXq
 kMvKJWK0itNDFZ7S6DnHCrkyrGE=
 =eyPW
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmdlnesACgkQYKtH/8kJ
 UidCnBAAoD6Hdw/nZ06oIGau0wFCnno+Ucao+vmvaDNeJfRE2orV7ZvTvw2qkB/Y
 gflifeCjH2JoaPEDHm5i9iE+KkZBL7A1zXkpAKj1RpxwNBkEY10nes0VOdNdx+Jc
 2SdSSiz/9ZD1wS81bZRmdHInrj22ZCsR/Vv6u8025eRixVpcwOSBPinHoYrrTeat
 vJr1ukr62paHzLTNKOEv0ikNe9FvbFBT/KNl9kp+afPCdqV0qgYL/L7bdAuLvcYe
 FsxJSdND55tlK7N7tjkfdLmWTSJZH2+QgMamEKijdEr536uLm62WTo0yGBLBGD0K
 2vgu1rrqh7CWWDFoUsXc8QUeUBPZY7KnaF6Kkl5yiWXINsTfzsYElqG4rcxF0YkR
 6syqPX9kwXVIxN2Xi2/1Xq9eny8eynGI6RlxlG87fV6QBYOEkpqAu0dYIIl7mwyI
 YPh+gGjhUDk5sIsDvDJtQ125eF/fUK4hMPHoFnYt+d8sBD4ukkXO7vGsn3SQxJb5
 95dPlNF5Kx0ZebbGiXnaqOaJGIPiDZPi5J6ddnThjYGsg4pKfd/dT+FXardTX78G
 B9pNtgMKJPL7TLHIl0nkQICJ444BHLWfhLSl1twZPxtbzRqCD0KVYsS9/vQpaYeb
 6S4UvqbDJnwX4wvZ7sPxP+/yV2eaXpb+VE3fIOoRv+JfmLd1fyw=
 =ZMWq
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v6.14-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v6.14, round 1

Highlights:
----------

- MPU:
  - STM32MP13:
    - Populate all timer counter nodes in Soc file.
    - Enable counter (timers) on stm32mp135f-dk.
    - DH core: increase CPU voltage to fit with STM32MP135F datasheet.

  - STMP32MP15:
    - Populate all timer counter nodes in Soc file.
    - Enable counter (timers) on stm32mp15 EV1 and DK boards.

    - OCTAVO:
      - LXA-TAC (gen1/2): disable RTC, update aliases and
        adjust USB gadget.
      - Add LXA-TAC gen3 based on OSD32MP153x SIP:
        STMP32MP153, RAM, PMIC.

    - DH: minor fixes.

  - STM32MP25:
    - Enable imx335/CSI/DCMIPP pipeline on stm32mp257f-ev1.
    - Add I2S, SAI, SPDIFRX supports.
    - Add and enable COMBOPHY on stm32mp257f-ev1. Combophy is used
      by PCIe and USB3.

* tag 'stm32-dt-for-v6.14-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (23 commits)
  arm64: dts: st: enable imx335/csi/dcmipp pipeline on stm32mp257f-ev1
  arm64: dts: st: add csi & dcmipp node in stm32mp25
  ARM: dts: stm32: Swap USART3 and UART8 alias on STM32MP15xx DHCOM SoM
  ARM: dts: stm32: add counter subnodes on stm32mp157 dk boards
  ARM: dts: stm32: add counter subnodes on stm32mp157c-ev1
  ARM: dts: stm32: add counter subnodes on stm32mp135f-dk
  ARM: dts: stm32: populate all timer counter nodes on stm32mp15
  ARM: dts: stm32: populate all timer counter nodes on stm32mp13
  ARM: dts: stm32: lxa-tac: Add support for generation 3 devices
  ARM: dts: stm32: lxa-tac: move adc and gpio{e,g} to gen{1,2} boards
  dt-bindings: arm: stm32: add compatible strings for Linux Automation LXA TAC gen 3
  ARM: dts: stm32: lxa-tac: adjust USB gadget fifo sizes for multi function
  ARM: dts: stm32: lxa-tac: extend the alias table
  ARM: dts: stm32: lxa-tac: disable the real time clock
  ARM: dts: stm32: Fix IPCC EXTI declaration on stm32mp151
  ARM: dts: stm32: Sort M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT
  ARM: dts: stm32: Increase CPU core voltage on STM32MP13xx DHCOR SoM
  ARM: dts: stm32: Deduplicate serial aliases and chosen node for STM32MP15xx DHCOM SoM
  arm64: dts: st: Enable COMBOPHY on the stm32mp257f-ev1 board
  arm64: dts: st: Add combophy node on stm32mp251
  ...

Link: https://lore.kernel.org/r/7ffcca65-3953-413a-bcf3-0702a6b0518b@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2024-12-20 17:40:06 +01:00
commit 2b3f2a1496
18 changed files with 922 additions and 129 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
Documentation/devicetree/bindings/arm/stm32/stm32.yaml
View File

@ -91,6 +91,13 @@ properties:
- const: dh,stm32mp153c-dhcor-som
- const: st,stm32mp153
- description: Octavo OSD32MP153 System-in-Package based boards
items:
- enum:
- lxa,stm32mp153c-tac-gen3 # Linux Automation TAC (Generation 3)
- const: oct,stm32mp153x-osd32
- const: st,stm32mp153
- items:
- enum:
- shiratech,stm32mp157a-iot-box # IoT Box

1
arch/arm/boot/dts/st/Makefile
View File

@ -39,6 +39,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32mp151c-mect1s.dtb \
stm32mp153c-dhcom-drc02.dtb \
stm32mp153c-dhcor-drc-compact.dtb \
stm32mp153c-lxa-tac-gen3.dtb \
stm32mp153c-mecio1r1.dtb \
stm32mp157a-avenger96.dtb \
stm32mp157a-dhcor-avenger96.dtb \

40
arch/arm/boot/dts/st/stm32mp131.dtsi
View File

@ -261,6 +261,11 @@ timers6: timer@40004000 {
dma-names = "up";
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
timer@5 {
compatible = "st,stm32h7-timer-trigger";
reg = <5>;
@ -281,6 +286,11 @@ timers7: timer@40005000 {
dma-names = "up";
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
timer@6 {
compatible = "st,stm32h7-timer-trigger";
reg = <6>;
@ -1196,6 +1206,11 @@ timers12: timer@4c007000 {
access-controllers = <&etzpc 23>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
@ -1221,6 +1236,11 @@ timers13: timer@4c008000 {
access-controllers = <&etzpc 24>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
@ -1246,6 +1266,11 @@ timers14: timer@4c009000 {
access-controllers = <&etzpc 25>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
@ -1276,6 +1301,11 @@ timers15: timer@4c00a000 {
access-controllers = <&etzpc 26>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
@ -1304,6 +1334,11 @@ timers16: timer@4c00b000 {
access-controllers = <&etzpc 27>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
@ -1332,6 +1367,11 @@ timers17: timer@4c00c000 {
access-controllers = <&etzpc 28>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;

12
arch/arm/boot/dts/st/stm32mp135f-dk.dts
View File

@ -440,6 +440,9 @@ &timers3 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
counter {
status = "okay";
};
pwm {
/* PWM output on pin 7 of the expansion connector (CN8.7) using TIM3_CH4 func */
pinctrl-0 = <&pwm3_pins_a>;
@ -456,6 +459,9 @@ &timers4 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
counter {
status = "okay";
};
pwm {
/* PWM output on pin 31 of the expansion connector (CN8.31) using TIM4_CH2 func */
pinctrl-0 = <&pwm4_pins_a>;
@ -472,6 +478,9 @@ &timers8 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
counter {
status = "okay";
};
pwm {
/* PWM output on pin 32 of the expansion connector (CN8.32) using TIM8_CH3 func */
pinctrl-0 = <&pwm8_pins_a>;
@ -486,6 +495,9 @@ timer@7 {
&timers14 {
status = "disabled";
counter {
status = "okay";
};
pwm {
/* PWM output on pin 33 of the expansion connector (CN8.33) using TIM14_CH1 func */
pinctrl-0 = <&pwm14_pins_a>;

16
arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi
View File

@ -85,8 +85,8 @@ regulators {
vddcpu: buck1 { /* VDD_CPU_1V2 */
regulator-name = "vddcpu";
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <1250000>;
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
@ -201,17 +201,17 @@ eeprom0: eeprom@50 {
pagesize = <64>;
};
eeprom0wl: eeprom@58 {
compatible = "st,24256e-wl"; /* ST M24256E WL page of 0x50 */
pagesize = <64>;
reg = <0x58>;
};
rv3032: rtc@51 {
compatible = "microcrystal,rv3032";
reg = <0x51>;
interrupts-extended = <&gpioi 0 IRQ_TYPE_EDGE_FALLING>;
};
eeprom0wl: eeprom@58 {
compatible = "st,24256e-wl"; /* ST M24256E WL page of 0x50 */
pagesize = <64>;
reg = <0x58>;
};
};
&iwdg2 {

43
arch/arm/boot/dts/st/stm32mp151.dtsi
View File

@ -129,7 +129,7 @@ ipcc: mailbox@4c001000 {
reg = <0x4c001000 0x400>;
st,proc-id = <0>;
interrupts-extended =
<&exti 61 1>,
<&exti 61 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "rx", "tx";
clocks = <&rcc IPCC>;
@ -578,6 +578,11 @@ timers6: timer@40004000 {
access-controllers = <&etzpc 20>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
timer@5 {
compatible = "st,stm32h7-timer-trigger";
reg = <5>;
@ -599,6 +604,11 @@ timers7: timer@40005000 {
access-controllers = <&etzpc 21>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
timer@6 {
compatible = "st,stm32h7-timer-trigger";
reg = <6>;
@ -618,6 +628,11 @@ timers12: timer@40006000 {
access-controllers = <&etzpc 22>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
@ -643,6 +658,11 @@ timers13: timer@40007000 {
access-controllers = <&etzpc 23>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
@ -668,6 +688,11 @@ timers14: timer@40008000 {
access-controllers = <&etzpc 24>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
@ -1116,6 +1141,11 @@ timers15: timer@44006000 {
access-controllers = <&etzpc 54>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
@ -1144,11 +1174,17 @@ timers16: timer@44007000 {
access-controllers = <&etzpc 55>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@15 {
compatible = "st,stm32h7-timer-trigger";
reg = <15>;
@ -1171,6 +1207,11 @@ timers17: timer@44008000 {
access-controllers = <&etzpc 56>;
status = "disabled";
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;

267
arch/arm/boot/dts/st/stm32mp153c-lxa-tac-gen3.dts Normal file
View File

@ -0,0 +1,267 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
/*
* Copyright (C) 2020 STMicroelectronics - All Rights Reserved
* Copyright (C) 2021 Rouven Czerwinski, Pengutronix
* Copyright (C) 2023, 2024 Leonard Göhrs, Pengutronix
*/
/dts-v1/;
#include "stm32mp153.dtsi"
#include "stm32mp15xc-lxa-tac.dtsi"
/ {
model = "Linux Automation Test Automation Controller (TAC) Gen 3";
compatible = "lxa,stm32mp153c-tac-gen3", "oct,stm32mp153x-osd32", "st,stm32mp153";
backlight: backlight {
compatible = "pwm-backlight";
power-supply = <&v3v3>;
brightness-levels = <0 31 63 95 127 159 191 223 255>;
default-brightness-level = <7>;
pwms = <&led_pwm 3 1000000 0>;
};
reg_iobus_12v: regulator-iobus-12v {
compatible = "regulator-fixed";
vin-supply = <&reg_12v>;
gpio = <&gpioh 13 GPIO_ACTIVE_LOW>;
regulator-max-microvolt = <12000000>;
regulator-min-microvolt = <12000000>;
regulator-name = "12V_IOBUS";
};
led-controller-1 {
compatible = "pwm-leds-multicolor";
multi-led {
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_STATUS;
max-brightness = <65535>;
led-red {
active-low;
color = <LED_COLOR_ID_RED>;
pwms = <&led_pwm 0 1000000 0>;
};
led-green {
active-low;
color = <LED_COLOR_ID_GREEN>;
pwms = <&led_pwm 2 1000000 0>;
};
led-blue {
active-low;
color = <LED_COLOR_ID_BLUE>;
pwms = <&led_pwm 1 1000000 0>;
};
};
};
led-controller-2 {
compatible = "gpio-leds";
led-5 {
label = "tac:green:iobus";
gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
};
led-6 {
label = "tac:green:can";
gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
};
led-7 {
label = "tac:green:out0";
gpios = <&gpiob 8 GPIO_ACTIVE_HIGH>;
};
led-8 {
label = "tac:green:out1";
gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>;
};
led-9 {
label = "tac:green:uarttx";
gpios = <&gpiod 3 GPIO_ACTIVE_HIGH>;
};
led-10 {
label = "tac:green:uartrx";
gpios = <&gpiof 6 GPIO_ACTIVE_HIGH>;
};
led-11 {
label = "tac:green:usbh1";
gpios = <&gpioc 8 GPIO_ACTIVE_HIGH>;
};
led-12 {
label = "tac:green:usbh2";
gpios = <&gpiod 6 GPIO_ACTIVE_HIGH>;
};
led-13 {
label = "tac:green:usbh3";
gpios = <&gpiob 9 GPIO_ACTIVE_HIGH>;
};
led-14 {
label = "tac:green:usbg";
gpios = <&gpiod 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "usb-gadget";
};
led-15 {
label = "tac:green:dutpwr";
gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>;
};
};
};
&adc {
pinctrl-names = "default";
pinctrl-0 = <&board_adc1_ain_pins>;
vdd-supply = <&vdd>;
vdda-supply = <&vdda>;
vref-supply = <&vrefbuf>;
status = "okay";
adc1: adc@0 {
st,adc-channels = <2 5 9 10 13 14 15 18>;
st,min-sample-time-nsecs = <5000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
channel@2 {
reg = <2>;
label = "OUT_0_FB";
};
channel@5 {
reg = <5>;
label = "IOBUS_CURR_FB";
};
channel@9 {
reg = <9>;
label = "IOBUS_VOLT_FB";
};
channel@10 {
reg = <10>;
label = "OUT_1_FB";
};
channel@13 {
reg = <13>;
label = "HOST_CURR_FB";
};
channel@14 {
reg = <14>;
label = "HOST_3_CURR_FB";
};
channel@15 {
reg = <15>;
label = "HOST_1_CURR_FB";
};
channel@18 {
reg = <18>;
label = "HOST_2_CURR_FB";
};
};
adc2: adc@100 {
st,adc-channels = <12>;
st,min-sample-time-nsecs = <500000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
channel@12 {
reg = <12>;
label = "TEMP_INTERNAL";
};
};
};
&gpioa {
gpio-line-names = "", "", "", "", "", /* 0 */
"ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */
"", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP", /* 10 */
""; /* 15 */
};
&gpioc {
gpio-line-names = "", "DUT_PWR_DISCH", "", "", "", /* 0 */
"", "", "", "", "", /* 5 */
"", ""; /* 10 */
};
&gpioe {
gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */
"", "", "USER_BTN2", "DUT_PWR_EN", "UART_TX_EN", /* 5 */
"UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */
"TP27"; /* 15 */
};
&gpiog {
gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */
"IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */
"POWER_ADC_RESET", "", "", "", "", /* 10 */
""; /* 15 */
};
&m_can2 {
termination-gpios = <&gpioe 4 GPIO_ACTIVE_HIGH>;
termination-ohms = <120>;
};
&pinctrl {
board_adc1_ain_pins: board-adc1-ain-0 {
pins {
pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */
<STM32_PINMUX('B', 1, ANALOG)>, /* ADC1_INP5 */
<STM32_PINMUX('B', 0, ANALOG)>, /* ADC1_INP9 */
<STM32_PINMUX('C', 0, ANALOG)>, /* ADC1_INP10 */
<STM32_PINMUX('C', 3, ANALOG)>, /* ADC1_INP13 */
<STM32_PINMUX('A', 2, ANALOG)>, /* ADC1_INP14 */
<STM32_PINMUX('A', 3, ANALOG)>, /* ADC1_INP15 */
<STM32_PINMUX('A', 4, ANALOG)>; /* ADC1_INP18 */
};
};
};
&spi2 {
adc@0 {
compatible = "ti,lmp92064";
reg = <0>;
reset-gpios = <&gpiog 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
shunt-resistor-micro-ohms = <15000>;
spi-max-frequency = <5000000>;
vdd-supply = <&reg_pb_3v3>;
vdig-supply = <&reg_pb_3v3>;
};
};
&timers8 {
/* spare dmas for other usage */
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
led_pwm: pwm {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pwm8_pins_b>;
pinctrl-1 = <&pwm8_sleep_pins_b>;
status = "okay";
};
};

9
arch/arm/boot/dts/st/stm32mp157c-ev1.dts
View File

@ -306,6 +306,9 @@ &timers2 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
counter {
status = "okay";
};
pwm {
pinctrl-0 = <&pwm2_pins_a>;
pinctrl-1 = <&pwm2_sleep_pins_a>;
@ -321,6 +324,9 @@ &timers8 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
counter {
status = "okay";
};
pwm {
pinctrl-0 = <&pwm8_pins_a>;
pinctrl-1 = <&pwm8_sleep_pins_a>;
@ -336,6 +342,9 @@ &timers12 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
counter {
status = "okay";
};
pwm {
pinctrl-0 = <&pwm12_pins_a>;
pinctrl-1 = <&pwm12_sleep_pins_a>;

84
arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts
View File

@ -35,6 +35,76 @@ reg_iobus_12v: regulator-iobus-12v {
};
};
&adc {
pinctrl-names = "default";
pinctrl-0 = <&adc1_ain_pins_a>;
vdd-supply = <&vdd>;
vdda-supply = <&vdda>;
vref-supply = <&vrefbuf>;
status = "okay";
adc1: adc@0 {
st,adc-channels = <0 1 2 5 9 10 13 15>;
st,min-sample-time-nsecs = <5000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
channel@0 {
reg = <0>;
label = "HOST_2_CURR_FB";
};
channel@1 {
reg = <1>;
label = "HOST_3_CURR_FB";
};
channel@2 {
reg = <2>;
label = "OUT_0_FB";
};
channel@5 {
reg = <5>;
label = "IOBUS_CURR_FB";
};
channel@9 {
reg = <9>;
label = "IOBUS_VOLT_FB";
};
channel@10 {
reg = <10>;
label = "OUT_1_FB";
};
channel@13 {
reg = <13>;
label = "HOST_CURR_FB";
};
channel@15 {
reg = <15>;
label = "HOST_1_CURR_FB";
};
};
adc2: adc@100 {
st,adc-channels = <12>;
st,min-sample-time-nsecs = <500000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
channel@12 {
reg = <12>;
label = "TEMP_INTERNAL";
};
};
};
&gpioa {
gpio-line-names = "", "", "STACK_CS2", "", "STACK_CS3", /* 0 */
"ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */
@ -48,6 +118,20 @@ &gpioc {
"", ""; /* 10 */
};
&gpioe {
gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */
"", "", "USER_BTN2", "TP48", "UART_TX_EN", /* 5 */
"UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */
"TP27"; /* 15 */
};
&gpiog {
gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */
"IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */
"TP49", "", "", "", "", /* 10 */
""; /* 15 */
};
&gpu {
status = "disabled";
};

84
arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts
View File

@ -121,6 +121,76 @@ led-15 {
};
};
&adc {
pinctrl-names = "default";
pinctrl-0 = <&adc1_ain_pins_a>;
vdd-supply = <&vdd>;
vdda-supply = <&vdda>;
vref-supply = <&vrefbuf>;
status = "okay";
adc1: adc@0 {
st,adc-channels = <0 1 2 5 9 10 13 15>;
st,min-sample-time-nsecs = <5000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
channel@0 {
reg = <0>;
label = "HOST_2_CURR_FB";
};
channel@1 {
reg = <1>;
label = "HOST_3_CURR_FB";
};
channel@2 {
reg = <2>;
label = "OUT_0_FB";
};
channel@5 {
reg = <5>;
label = "IOBUS_CURR_FB";
};
channel@9 {
reg = <9>;
label = "IOBUS_VOLT_FB";
};
channel@10 {
reg = <10>;
label = "OUT_1_FB";
};
channel@13 {
reg = <13>;
label = "HOST_CURR_FB";
};
channel@15 {
reg = <15>;
label = "HOST_1_CURR_FB";
};
};
adc2: adc@100 {
st,adc-channels = <12>;
st,min-sample-time-nsecs = <500000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
channel@12 {
reg = <12>;
label = "TEMP_INTERNAL";
};
};
};
&gpioa {
gpio-line-names = "", "", "DUT_PWR_EN", "", "STACK_CS3", /* 0 */
"ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */
@ -134,6 +204,20 @@ &gpioc {
"", ""; /* 10 */
};
&gpioe {
gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */
"", "", "USER_BTN2", "TP48", "UART_TX_EN", /* 5 */
"UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */
"TP27"; /* 15 */
};
&gpiog {
gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */
"IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */
"TP49", "", "", "", "", /* 10 */
""; /* 15 */
};
&gpu {
status = "disabled";
};

100
arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi
View File

@ -16,12 +16,20 @@
/ {
aliases {
can0 = &m_can1;
can1 = &m_can2;
ethernet0 = &ethernet0;
ethernet1 = &port_uplink;
ethernet2 = &port_dut;
i2c0 = &i2c1;
i2c1 = &i2c4;
i2c2 = &i2c5;
mmc1 = &sdmmc2;
serial0 = &uart4;
serial1 = &usart3;
spi0 = &spi2;
spi1 = &spi4;
spi2 = &spi5;
};
chosen {
@ -142,76 +150,6 @@ output-vuart {
baseboard_eeprom: &sip_eeprom {
};
&adc {
pinctrl-names = "default";
pinctrl-0 = <&adc1_ain_pins_a>;
vdd-supply = <&vdd>;
vdda-supply = <&vdda>;
vref-supply = <&vrefbuf>;
status = "okay";
adc1: adc@0 {
st,adc-channels = <0 1 2 5 9 10 13 15>;
st,min-sample-time-nsecs = <5000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
channel@0 {
reg = <0>;
label = "HOST_2_CURR_FB";
};
channel@1 {
reg = <1>;
label = "HOST_3_CURR_FB";
};
channel@2 {
reg = <2>;
label = "OUT_0_FB";
};
channel@5 {
reg = <5>;
label = "IOBUS_CURR_FB";
};
channel@9 {
reg = <9>;
label = "IOBUS_VOLT_FB";
};
channel@10 {
reg = <10>;
label = "OUT_1_FB";
};
channel@13 {
reg = <13>;
label = "HOST_CURR_FB";
};
channel@15 {
reg = <15>;
label = "HOST_1_CURR_FB";
};
};
adc2: adc@100 {
st,adc-channels = <12>;
st,min-sample-time-nsecs = <500000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
channel@12 {
reg = <12>;
label = "TEMP_INTERNAL";
};
};
};
&crc1 {
status = "okay";
};
@ -265,13 +203,6 @@ &gpiod {
"ETH_LAB_LEDRN"; /* 15 */
};
&gpioe {
gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */
"", "", "USER_BTN2", "TP48", "UART_TX_EN", /* 5 */
"UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */
"TP27"; /* 15 */
};
&gpiof {
gpio-line-names = "TP36", "TP37", "", "", "OLED_CS", /* 0 */
"", "", "", "", "", /* 5 */
@ -279,13 +210,6 @@ &gpiof {
""; /* 15 */
};
&gpiog {
gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */
"IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */
"TP49", "", "", "", "", /* 10 */
""; /* 15 */
};
&gpioh {
gpio-line-names = "", "", "OUT_1", "OUT_0", "OLED_RESET", /* 0 */
"", "", "", "", "", /* 5 */
@ -379,10 +303,6 @@ regulators {
};
};
&rtc {
status = "okay";
};
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>;
@ -576,6 +496,10 @@ &usbotg_hs {
vusb_d-supply = <&vdd_usb>;
vusb_a-supply = <&reg18>;
g-rx-fifo-size = <512>;
g-np-tx-fifo-size = <32>;
g-tx-fifo-size = <128 128 64 16 16 16 16 16>;
dr_mode = "peripheral";
status = "okay";

12
arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi
View File

@ -6,18 +6,6 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/pwm/pwm.h>
/ {
aliases {
serial0 = &uart4;
serial1 = &usart3;
serial2 = &uart8;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&adc {
status = "disabled";
};

10
arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi
View File

@ -7,16 +7,6 @@
#include <dt-bindings/pwm/pwm.h>
/ {
aliases {
serial0 = &uart4;
serial1 = &usart3;
serial2 = &uart8;
};
chosen {
stdout-path = "serial0:115200n8";
};
clk_ext_audio_codec: clock-codec {
compatible = "fixed-clock";
#clock-cells = <0>;

10
arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi
View File

@ -7,16 +7,6 @@
#include <dt-bindings/pwm/pwm.h>
/ {
aliases {
serial0 = &uart4;
serial1 = &usart3;
serial2 = &uart8;
};
chosen {
stdout-path = "serial0:115200n8";
};
led {
compatible = "gpio-leds";

7
arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi
View File

@ -14,6 +14,13 @@ aliases {
ethernet1 = &ksz8851;
rtc0 = &hwrtc;
rtc1 = &rtc;
serial0 = &uart4;
serial1 = &uart8;
serial2 = &usart3;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@c0000000 {

18
arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
View File

@ -570,6 +570,9 @@ &timers1 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
counter {
status = "okay";
};
pwm {
pinctrl-0 = <&pwm1_pins_a>;
pinctrl-1 = <&pwm1_sleep_pins_a>;
@ -585,6 +588,9 @@ &timers3 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
counter {
status = "okay";
};
pwm {
pinctrl-0 = <&pwm3_pins_a>;
pinctrl-1 = <&pwm3_sleep_pins_a>;
@ -600,6 +606,9 @@ &timers4 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
counter {
status = "okay";
};
pwm {
pinctrl-0 = <&pwm4_pins_a &pwm4_pins_b>;
pinctrl-1 = <&pwm4_sleep_pins_a &pwm4_sleep_pins_b>;
@ -615,6 +624,9 @@ &timers5 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
counter {
status = "okay";
};
pwm {
pinctrl-0 = <&pwm5_pins_a>;
pinctrl-1 = <&pwm5_sleep_pins_a>;
@ -630,6 +642,9 @@ &timers6 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
counter {
status = "okay";
};
timer@5 {
status = "okay";
};
@ -639,6 +654,9 @@ &timers12 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
counter {
status = "okay";
};
pwm {
pinctrl-0 = <&pwm12_pins_a>;
pinctrl-1 = <&pwm12_sleep_pins_a>;

234
arch/arm64/boot/dts/st/stm32mp251.dtsi
View File

@ -7,6 +7,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/st,stm32mp25-rcc.h>
#include <dt-bindings/regulator/st,stm32mp25-regulator.h>
#include <dt-bindings/phy/phy.h>
/ {
#address-cells = <2>;
@ -237,6 +238,21 @@ rifsc: bus@42080000 {
#access-controller-cells = <1>;
ranges;
i2s2: audio-controller@400b0000 {
compatible = "st,stm32mp25-i2s";
reg = <0x400b0000 0x400>;
#sound-dai-cells = <0>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_BUS_SPI2>, <&rcc CK_KER_SPI2>;
clock-names = "pclk", "i2sclk";
resets = <&rcc SPI2_R>;
dmas = <&hpdma 51 0x43 0x12>,
<&hpdma 52 0x43 0x21>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 23>;
status = "disabled";
};
spi2: spi@400b0000 {
#address-cells = <1>;
#size-cells = <0>;
@ -252,6 +268,21 @@ spi2: spi@400b0000 {
status = "disabled";
};
i2s3: audio-controller@400c0000 {
compatible = "st,stm32mp25-i2s";
reg = <0x400c0000 0x400>;
#sound-dai-cells = <0>;
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_BUS_SPI3>, <&rcc CK_KER_SPI3>;
clock-names = "pclk", "i2sclk";
resets = <&rcc SPI3_R>;
dmas = <&hpdma 53 0x43 0x12>,
<&hpdma 54 0x43 0x21>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 24>;
status = "disabled";
};
spi3: spi@400c0000 {
#address-cells = <1>;
#size-cells = <0>;
@ -267,6 +298,20 @@ spi3: spi@400c0000 {
status = "disabled";
};
spdifrx: audio-controller@400d0000 {
compatible = "st,stm32h7-spdifrx";
#sound-dai-cells = <0>;
reg = <0x400d0000 0x400>;
clocks = <&rcc CK_KER_SPDIFRX>;
clock-names = "kclk";
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&hpdma 71 0x43 0x212>,
<&hpdma 72 0x43 0x212>;
dma-names = "rx", "rx-ctrl";
access-controllers = <&rifsc 30>;
status = "disabled";
};
usart2: serial@400e0000 {
compatible = "st,stm32h7-uart";
reg = <0x400e0000 0x400>;
@ -439,6 +484,21 @@ usart6: serial@40220000 {
status = "disabled";
};
i2s1: audio-controller@40230000 {
compatible = "st,stm32mp25-i2s";
reg = <0x40230000 0x400>;
#sound-dai-cells = <0>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_BUS_SPI1>, <&rcc CK_KER_SPI1>;
clock-names = "pclk", "i2sclk";
resets = <&rcc SPI1_R>;
dmas = <&hpdma 49 0x43 0x12>,
<&hpdma 50 0x43 0x21>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 22>;
status = "disabled";
};
spi1: spi@40230000 {
#address-cells = <1>;
#size-cells = <0>;
@ -484,6 +544,108 @@ spi5: spi@40280000 {
status = "disabled";
};
sai1: sai@40290000 {
compatible = "st,stm32mp25-sai";
reg = <0x40290000 0x4>, <0x4029a3f0 0x10>;
ranges = <0 0x40290000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&rcc CK_BUS_SAI1>;
clock-names = "pclk";
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rcc SAI1_R>;
access-controllers = <&rifsc 49>;
status = "disabled";
sai1a: audio-controller@40290004 {
compatible = "st,stm32-sai-sub-a";
reg = <0x4 0x20>;
#sound-dai-cells = <0>;
clocks = <&rcc CK_KER_SAI1>;
clock-names = "sai_ck";
dmas = <&hpdma 73 0x43 0x21>;
status = "disabled";
};
sai1b: audio-controller@40290024 {
compatible = "st,stm32-sai-sub-b";
reg = <0x24 0x20>;
#sound-dai-cells = <0>;
clocks = <&rcc CK_KER_SAI1>;
clock-names = "sai_ck";
dmas = <&hpdma 74 0x43 0x12>;
status = "disabled";
};
};
sai2: sai@402a0000 {
compatible = "st,stm32mp25-sai";
reg = <0x402a0000 0x4>, <0x402aa3f0 0x10>;
ranges = <0 0x402a0000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&rcc CK_BUS_SAI2>;
clock-names = "pclk";
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rcc SAI2_R>;
access-controllers = <&rifsc 50>;
status = "disabled";
sai2a: audio-controller@402a0004 {
compatible = "st,stm32-sai-sub-a";
reg = <0x4 0x20>;
#sound-dai-cells = <0>;
clocks = <&rcc CK_KER_SAI2>;
clock-names = "sai_ck";
dmas = <&hpdma 75 0x43 0x21>;
status = "disabled";
};
sai2b: audio-controller@402a0024 {
compatible = "st,stm32-sai-sub-b";
reg = <0x24 0x20>;
#sound-dai-cells = <0>;
clocks = <&rcc CK_KER_SAI2>;
clock-names = "sai_ck";
dmas = <&hpdma 76 0x43 0x12>;
status = "disabled";
};
};
sai3: sai@402b0000 {
compatible = "st,stm32mp25-sai";
reg = <0x402b0000 0x4>, <0x402ba3f0 0x10>;
ranges = <0 0x402b0000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&rcc CK_BUS_SAI3>;
clock-names = "pclk";
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rcc SAI3_R>;
access-controllers = <&rifsc 51>;
status = "disabled";
sai3a: audio-controller@402b0004 {
compatible = "st,stm32-sai-sub-a";
reg = <0x4 0x20>;
#sound-dai-cells = <0>;
clocks = <&rcc CK_KER_SAI3>;
clock-names = "sai_ck";
dmas = <&hpdma 77 0x43 0x21>;
status = "disabled";
};
sai3b: audio-controller@502b0024 {
compatible = "st,stm32-sai-sub-b";
reg = <0x24 0x20>;
#sound-dai-cells = <0>;
clocks = <&rcc CK_KER_SAI3>;
clock-names = "sai_ck";
dmas = <&hpdma 78 0x43 0x12>;
status = "disabled";
};
};
uart9: serial@402c0000 {
compatible = "st,stm32h7-uart";
reg = <0x402c0000 0x400>;
@ -508,6 +670,40 @@ usart1: serial@40330000 {
status = "disabled";
};
sai4: sai@40340000 {
compatible = "st,stm32mp25-sai";
reg = <0x40340000 0x4>, <0x4034a3f0 0x10>;
ranges = <0 0x40340000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&rcc CK_BUS_SAI4>;
clock-names = "pclk";
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rcc SAI4_R>;
access-controllers = <&rifsc 52>;
status = "disabled";
sai4a: audio-controller@40340004 {
compatible = "st,stm32-sai-sub-a";
reg = <0x4 0x20>;
#sound-dai-cells = <0>;
clocks = <&rcc CK_KER_SAI4>;
clock-names = "sai_ck";
dmas = <&hpdma 79 0x63 0x21>;
status = "disabled";
};
sai4b: audio-controller@40340024 {
compatible = "st,stm32-sai-sub-b";
reg = <0x24 0x20>;
#sound-dai-cells = <0>;
clocks = <&rcc CK_KER_SAI4>;
clock-names = "sai_ck";
dmas = <&hpdma 80 0x43 0x12>;
status = "disabled";
};
};
spi6: spi@40350000 {
#address-cells = <1>;
#size-cells = <0>;
@ -603,6 +799,44 @@ i2c8: i2c@46040000 {
status = "disabled";
};
csi: csi@48020000 {
compatible = "st,stm32mp25-csi";
reg = <0x48020000 0x2000>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rcc CSI_R>;
clocks = <&rcc CK_KER_CSI>, <&rcc CK_KER_CSITXESC>,
<&rcc CK_KER_CSIPHY>;
clock-names = "pclk", "txesc", "csi2phy";
access-controllers = <&rifsc 86>;
status = "disabled";
};
dcmipp: dcmipp@48030000 {
compatible = "st,stm32mp25-dcmipp";
reg = <0x48030000 0x1000>;
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rcc DCMIPP_R>;
clocks = <&rcc CK_BUS_DCMIPP>, <&rcc CK_KER_CSI>;
clock-names = "kclk", "mclk";
access-controllers = <&rifsc 87>;
status = "disabled";
};
combophy: phy@480c0000 {
compatible = "st,stm32mp25-combophy";
reg = <0x480c0000 0x1000>;
#phy-cells = <1>;
clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>;
clock-names = "apb", "ker";
resets = <&rcc USB3PCIEPHY_R>;
reset-names = "phy";
access-controllers = <&rifsc 67>;
power-domains = <&CLUSTER_PD>;
wakeup-source;
interrupts-extended = <&exti1 45 IRQ_TYPE_EDGE_FALLING>;
status = "disabled";
};
sdmmc1: mmc@48220000 {
compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00353180>;

97
arch/arm64/boot/dts/st/stm32mp257f-ev1.dts
View File

@ -27,6 +27,44 @@ chosen {
stdout-path = "serial0:115200n8";
};
clocks {
clk_ext_camera: clk-ext-camera {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
};
pad_clk: pad-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
};
};
imx335_2v9: regulator-2v9 {
compatible = "regulator-fixed";
regulator-name = "imx335-avdd";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
regulator-always-on;
};
imx335_1v8: regulator-1v8 {
compatible = "regulator-fixed";
regulator-name = "imx335-ovdd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
imx335_1v2: regulator-1v2 {
compatible = "regulator-fixed";
regulator-name = "imx335-dvdd";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x1 0x0>;
@ -50,6 +88,46 @@ &arm_wdt {
status = "okay";
};
&combophy {
clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>, <&pad_clk>;
clock-names = "apb", "ker", "pad";
status = "okay";
};
&csi {
vdd-supply = <&scmi_vddcore>;
vdda18-supply = <&scmi_v1v8>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
csi_sink: endpoint {
remote-endpoint = <&imx335_ep>;
data-lanes = <1 2>;
bus-type = <4>;
};
};
port@1 {
reg = <1>;
csi_source: endpoint {
remote-endpoint = <&dcmipp_0>;
};
};
};
};
&dcmipp {
status = "okay";
port {
dcmipp_0: endpoint {
remote-endpoint = <&csi_source>;
bus-type = <4>;
};
};
};
&ethernet2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&eth2_rgmii_pins_a>;
@ -81,6 +159,25 @@ &i2c2 {
i2c-scl-falling-time-ns = <13>;
clock-frequency = <400000>;
status = "okay";
imx335: camera@1a {
compatible = "sony,imx335";
reg = <0x1a>;
clocks = <&clk_ext_camera>;
avdd-supply = <&imx335_2v9>;
ovdd-supply = <&imx335_1v8>;
dvdd-supply = <&imx335_1v2>;
reset-gpios = <&gpioi 7 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
port {
imx335_ep: endpoint {
remote-endpoint = <&csi_sink>;
clock-lanes = <0>;
data-lanes = <1 2>;
link-frequencies = /bits/ 64 <594000000>;
};
};
};
};
&i2c8 {