OMAP SoC updates for v6.16

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Merge tag 'omap-for-v6.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/arm

OMAP SoC updates for v6.16

* tag 'omap-for-v6.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap:
  ARM: OMAP2+: Fix l4ls clk domain handling in STANDBY
  bus: ti-sysc: PRUSS OCP configuration
  ARM: omap: pmic-cpcap: do not mess around without CPCAP or OMAP4
  ARM: omap2plus_defconfig: enable I2C devices of GTA04

Link: https://lore.kernel.org/r/7ha57jrtkl.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-05-12 10:13:36 +02:00
commit 2b3949f526
6 changed files with 46 additions and 4 deletions

View File

@ -608,6 +608,7 @@ CONFIG_LEDS_LP5523=m
CONFIG_LEDS_PCA963X=m
CONFIG_LEDS_PWM=m
CONFIG_LEDS_BD2606MVV=m
CONFIG_LEDS_TCA6507=m
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=m
CONFIG_LEDS_TRIGGER_ONESHOT=m
@ -642,6 +643,8 @@ CONFIG_TI_EMIF_SRAM=m
CONFIG_IIO=m
CONFIG_IIO_SW_DEVICE=m
CONFIG_IIO_SW_TRIGGER=m
CONFIG_BMA180=m
CONFIG_BMC150_ACCEL=m
CONFIG_IIO_ST_ACCEL_3AXIS=m
CONFIG_KXCJK1013=m
CONFIG_CPCAP_ADC=m
@ -649,10 +652,15 @@ CONFIG_INA2XX_ADC=m
CONFIG_TI_AM335X_ADC=m
CONFIG_TWL4030_MADC=m
CONFIG_TWL6030_GPADC=m
CONFIG_BMG160=m
CONFIG_MPU3050_I2C=m
CONFIG_ITG3200=m
CONFIG_BOSCH_BNO055_I2C=m
CONFIG_INV_MPU6050_I2C=m
CONFIG_SENSORS_ISL29028=m
CONFIG_AK8975=m
CONFIG_BMC150_MAGN_I2C=m
CONFIG_SENSORS_HMC5843_I2C=m
CONFIG_BMP280=m
CONFIG_PWM=y
CONFIG_PWM_OMAP_DMTIMER=m

View File

@ -48,6 +48,7 @@
#define CLKDM_NO_AUTODEPS (1 << 4)
#define CLKDM_ACTIVE_WITH_MPU (1 << 5)
#define CLKDM_MISSING_IDLE_REPORTING (1 << 6)
#define CLKDM_STANDBY_FORCE_WAKEUP BIT(7)
#define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO)
#define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP)

View File

@ -19,7 +19,7 @@ static struct clockdomain l4ls_am33xx_clkdm = {
.pwrdm = { .name = "per_pwrdm" },
.cm_inst = AM33XX_CM_PER_MOD,
.clkdm_offs = AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET,
.flags = CLKDM_CAN_SWSUP,
.flags = CLKDM_CAN_SWSUP | CLKDM_STANDBY_FORCE_WAKEUP,
};
static struct clockdomain l3s_am33xx_clkdm = {

View File

@ -20,6 +20,9 @@
#include "cm-regbits-34xx.h"
#include "cm-regbits-33xx.h"
#include "prm33xx.h"
#if IS_ENABLED(CONFIG_SUSPEND)
#include <linux/suspend.h>
#endif
/*
* CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
@ -328,8 +331,17 @@ static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm)
{
bool hwsup = false;
#if IS_ENABLED(CONFIG_SUSPEND)
/*
* In case of standby, Don't put the l4ls clk domain to sleep.
* Since CM3 PM FW doesn't wake-up/enable the l4ls clk domain
* upon wake-up, CM3 PM FW fails to wake-up th MPU.
*/
if (pm_suspend_target_state == PM_SUSPEND_STANDBY &&
(clkdm->flags & CLKDM_STANDBY_FORCE_WAKEUP))
return 0;
#endif
hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
am33xx_clkdm_sleep(clkdm);

View File

@ -264,7 +264,11 @@ int __init omap4_cpcap_init(void)
static int __init cpcap_late_init(void)
{
omap4_vc_set_pmic_signaling(PWRDM_POWER_RET);
if (!of_find_compatible_node(NULL, NULL, "motorola,cpcap"))
return 0;
if (soc_is_omap443x() || soc_is_omap446x() || soc_is_omap447x())
omap4_vc_set_pmic_signaling(PWRDM_POWER_RET);
return 0;
}

View File

@ -2036,6 +2036,21 @@ static void sysc_module_disable_quirk_pruss(struct sysc *ddata)
sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
}
static void sysc_module_enable_quirk_pruss(struct sysc *ddata)
{
u32 reg;
reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
/*
* Clearing the SYSC_PRUSS_STANDBY_INIT bit - Updates OCP master
* port configuration to enable memory access outside of the
* PRU-ICSS subsystem.
*/
reg &= (~SYSC_PRUSS_STANDBY_INIT);
sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
}
static void sysc_init_module_quirks(struct sysc *ddata)
{
if (ddata->legacy_mode || !ddata->name)
@ -2088,8 +2103,10 @@ static void sysc_init_module_quirks(struct sysc *ddata)
ddata->module_disable_quirk = sysc_reset_done_quirk_wdt;
}
if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_PRUSS)
if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_PRUSS) {
ddata->module_enable_quirk = sysc_module_enable_quirk_pruss;
ddata->module_disable_quirk = sysc_module_disable_quirk_pruss;
}
}
static int sysc_clockdomain_init(struct sysc *ddata)