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net: ethernet: ravb: Add gPTP support for Gen4

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While driver advertises gPTP support on Gen4 platforms it is in fact
completely broken. On R-Car Gen4 devices the RAVB module have no
internal gPTP clock as generations before it. Instead it utilizes a
system-wide gPTP clock.

This change utilizes the refactoring of the RAVB gPTP code to add
support for a system-wide clock and stops the Gen4 devices trying to use
the non-existing internal gPTP clock.

To remain backward compatible the ptp-timer property is optional.If not
present, or not enabled, the RAVB driver will no longer advertise gPTP
support to user-space.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Sergey Shtylyov <sergei.shtylyov@gmail.com>
Link: https://patch.msgid.link/20260921175037.4084310-11-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Niklas Söderlund 2026-09-21 19:50:37 +02:00 committed by Jakub Kicinski
parent ef488a9da6
commit 2b240cfc6d
2 changed files with 56 additions and 1 deletions
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3
drivers/net/ethernet/renesas/ravb.h
View File

@ -249,6 +249,8 @@ enum APSR_BIT {
APSR_RDM = 0x00002000,
APSR_TDM = 0x00004000,
APSR_MIISELECT = 0x01000000, /* R-Car V4M only */
APSR_GPTPTIMER_SOURCE = BIT(25), /* Gen4 */
APSR_GPTPCLOCK = BIT(29), /* Gen4 */
};
/* RCR */
@ -1132,6 +1134,7 @@ struct ravb_private {
struct list_head ts_skb_list;
u32 ts_skb_tag;
struct ravb_ptp ptp;
struct device_node *of_gptp; /* Reference to external gPTP clock, if any. */
spinlock_t lock; /* Register access lock */
u32 cur_rx[NUM_RX_QUEUE]; /* Consumer ring indices */
u32 dirty_rx[NUM_RX_QUEUE]; /* Producer ring indices */

54
drivers/net/ethernet/renesas/ravb_main.c
View File

@ -2758,6 +2758,57 @@ static const struct ravb_hw_info ravb_gen3_hw_info = {
.magic_pkt = 1,
};
static int ravb_gen4_ptp_probe(struct net_device *ndev)
{
struct ravb_private *priv = netdev_priv(ndev);
priv->of_gptp = of_parse_phandle(priv->pdev->dev.of_node, "ptp-timer", 0);
if (!priv->of_gptp)
return 0;
if (!of_device_is_available(priv->of_gptp)) {
of_node_put(priv->of_gptp);
priv->of_gptp = NULL;
}
return 0;
}
static int ravb_gen4_ptp_clock_index(struct net_device *ndev)
{
struct ravb_private *priv = netdev_priv(ndev);
/* If no clock, mimic ptp_clock_index_by_of_node() fail and return -1 */
if (!priv->of_gptp)
return -1;
return ptp_clock_index_by_of_node(priv->of_gptp);
}
static int ravb_gen4_ptp_set_config_mode(struct net_device *ndev)
{
struct ravb_private *priv = netdev_priv(ndev);
int ret;
/* Enable gPTP Clock and Select High-speed peripheral bus clock. */
ret = ravb_set_opmode(ndev, CCC_OPC_CONFIG | CCC_GAC | CCC_CSEL_HPB);
if (ret)
return ret;
/* Set PTP source to GPTP module, only option on Gen4. */
if (priv->of_gptp)
ravb_modify(ndev, APSR, APSR_GPTPTIMER_SOURCE | APSR_GPTPCLOCK,
APSR_GPTPTIMER_SOURCE | APSR_GPTPCLOCK);
return 0;
}
static const struct ravb_gptp_info ravb_gen4_ptp_info = {
.probe = ravb_gen4_ptp_probe,
.clock_index = ravb_gen4_ptp_clock_index,
.set_config_mode = ravb_gen4_ptp_set_config_mode,
};
static const struct ravb_hw_info ravb_gen4_hw_info = {
.receive = ravb_rx_rcar,
.set_rate = ravb_set_rate_rcar,
@ -2780,7 +2831,7 @@ static const struct ravb_hw_info ravb_gen4_hw_info = {
.tx_counters = 1,
.multi_irqs = 1,
.irq_en_dis = 1,
.ptp = &ravb_gen3_ptp_info,
.ptp = &ravb_gen4_ptp_info,
.nc_queues = 1,
.magic_pkt = 1,
};
@ -3194,6 +3245,7 @@ static void ravb_remove(struct platform_device *pdev)
pm_runtime_disable(&pdev->dev);
pm_runtime_dont_use_autosuspend(dev);
clk_unprepare(priv->refclk);
of_node_put(priv->of_gptp);
reset_control_assert(priv->rstc);
free_netdev(ndev);
platform_set_drvdata(pdev, NULL);