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https://github.com/torvalds/linux.git
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platform-drivers-x86 for v6.7-6
Fixes: - Intel PMC GBE LTR regression - P2SB / PCI deadlock fix The following is an automated shortlog grouped by driver: intel/pmc: - Add suspend callback - Allow reenabling LTRs - Move GBE LTR ignore to suspend callback p2sb: - Allow p2sb_bar() calls during PCI device probe -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQSCSUwRdwTNL2MhaBlZrE9hU+XOMQUCZY7u1gAKCRBZrE9hU+XO MecEAP0eeRD/I4O3LoHgrifn0qoUgTO6SgmbZMscUTjesPsRbwD/YL2QP6LZ9qD5 8rF19nUifgLwFdj74WmcltjMPYJbDQo= =oSp6 -----END PGP SIGNATURE----- Merge tag 'platform-drivers-x86-v6.7-6' into pdx86/for-next Merge the 'platform-drivers-x86-v6.7-6' fixes into pdx86/for-next so that the "Intel PMC GBE LTR regression" fixes can also be applied to the new Arrow Lake and Lunar Lake platform support code in pdx86/for-next .
This commit is contained in:
Hans de Goede
commit
2ad815797e
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@ -16,12 +16,17 @@
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struct quirk_entry {
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u32 s2idle_bug_mmio;
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bool spurious_8042;
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};
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static struct quirk_entry quirk_s2idle_bug = {
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.s2idle_bug_mmio = 0xfed80380,
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};
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static struct quirk_entry quirk_spurious_8042 = {
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.spurious_8042 = true,
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};
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static const struct dmi_system_id fwbug_list[] = {
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{
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.ident = "L14 Gen2 AMD",
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@ -193,6 +198,16 @@ static const struct dmi_system_id fwbug_list[] = {
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DMI_MATCH(DMI_PRODUCT_NAME, "HP Laptop 15s-eq2xxx"),
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}
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},
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/* https://community.frame.work/t/tracking-framework-amd-ryzen-7040-series-lid-wakeup-behavior-feedback/39128 */
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{
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.ident = "Framework Laptop 13 (Phoenix)",
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.driver_data = &quirk_spurious_8042,
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Framework"),
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DMI_MATCH(DMI_PRODUCT_NAME, "Laptop 13 (AMD Ryzen 7040Series)"),
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DMI_MATCH(DMI_BIOS_VERSION, "03.03"),
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}
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},
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{}
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};
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@ -235,6 +250,9 @@ void amd_pmc_quirks_init(struct amd_pmc_dev *dev)
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{
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const struct dmi_system_id *dmi_id;
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if (dev->cpu_id == AMD_CPU_ID_CZN)
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dev->disable_8042_wakeup = true;
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dmi_id = dmi_first_match(fwbug_list);
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if (!dmi_id)
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return;
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@ -242,4 +260,6 @@ void amd_pmc_quirks_init(struct amd_pmc_dev *dev)
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if (dev->quirks->s2idle_bug_mmio)
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pr_info("Using s2idle quirk to avoid %s platform firmware bug\n",
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dmi_id->ident);
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if (dev->quirks->spurious_8042)
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dev->disable_8042_wakeup = true;
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}
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@ -91,16 +91,6 @@
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#define SMU_MSG_LOG_RESET 0x07
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#define SMU_MSG_LOG_DUMP_DATA 0x08
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#define SMU_MSG_GET_SUP_CONSTRAINTS 0x09
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/* List of supported CPU ids */
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#define AMD_CPU_ID_RV 0x15D0
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#define AMD_CPU_ID_RN 0x1630
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#define AMD_CPU_ID_PCO AMD_CPU_ID_RV
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#define AMD_CPU_ID_CZN AMD_CPU_ID_RN
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#define AMD_CPU_ID_YC 0x14B5
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#define AMD_CPU_ID_CB 0x14D8
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#define AMD_CPU_ID_PS 0x14E8
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#define AMD_CPU_ID_SP 0x14A4
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#define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507
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#define PMC_MSG_DELAY_MIN_US 50
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#define RESPONSE_REGISTER_LOOP_MAX 20000
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@ -766,19 +756,22 @@ static int amd_pmc_get_os_hint(struct amd_pmc_dev *dev)
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return -EINVAL;
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}
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static int amd_pmc_czn_wa_irq1(struct amd_pmc_dev *pdev)
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static int amd_pmc_wa_irq1(struct amd_pmc_dev *pdev)
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{
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struct device *d;
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int rc;
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if (!pdev->major) {
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rc = amd_pmc_get_smu_version(pdev);
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if (rc)
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return rc;
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}
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/* cezanne platform firmware has a fix in 64.66.0 */
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if (pdev->cpu_id == AMD_CPU_ID_CZN) {
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if (!pdev->major) {
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rc = amd_pmc_get_smu_version(pdev);
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if (rc)
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return rc;
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}
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if (pdev->major > 64 || (pdev->major == 64 && pdev->minor > 65))
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return 0;
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if (pdev->major > 64 || (pdev->major == 64 && pdev->minor > 65))
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return 0;
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}
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d = bus_find_device_by_name(&serio_bus, NULL, "serio0");
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if (!d)
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@ -937,8 +930,8 @@ static int amd_pmc_suspend_handler(struct device *dev)
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{
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struct amd_pmc_dev *pdev = dev_get_drvdata(dev);
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if (pdev->cpu_id == AMD_CPU_ID_CZN && !disable_workarounds) {
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int rc = amd_pmc_czn_wa_irq1(pdev);
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if (pdev->disable_8042_wakeup && !disable_workarounds) {
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int rc = amd_pmc_wa_irq1(pdev);
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if (rc) {
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dev_err(pdev->dev, "failed to adjust keyboard wakeup: %d\n", rc);
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@ -36,9 +36,21 @@ struct amd_pmc_dev {
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struct mutex lock; /* generic mutex lock */
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struct dentry *dbgfs_dir;
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struct quirk_entry *quirks;
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bool disable_8042_wakeup;
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};
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void amd_pmc_process_restore_quirks(struct amd_pmc_dev *dev);
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void amd_pmc_quirks_init(struct amd_pmc_dev *dev);
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/* List of supported CPU ids */
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#define AMD_CPU_ID_RV 0x15D0
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#define AMD_CPU_ID_RN 0x1630
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#define AMD_CPU_ID_PCO AMD_CPU_ID_RV
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#define AMD_CPU_ID_CZN AMD_CPU_ID_RN
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#define AMD_CPU_ID_YC 0x14B5
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#define AMD_CPU_ID_CB 0x14D8
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#define AMD_CPU_ID_PS 0x14E8
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#define AMD_CPU_ID_SP 0x14A4
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#define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507
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#endif /* PMC_H */
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@ -316,6 +316,9 @@ int adl_core_init(struct pmc_dev *pmcdev)
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struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN];
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int ret;
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pmcdev->suspend = cnl_suspend;
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pmcdev->resume = cnl_resume;
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pmc->map = &adl_reg_map;
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ret = get_primary_reg_base(pmc);
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if (ret)
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@ -323,11 +326,5 @@ int adl_core_init(struct pmc_dev *pmcdev)
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pmc_core_get_low_power_modes(pmcdev);
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/* Due to a hardware limitation, the GBE LTR blocks PC10
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* when a cable is attached. Tell the PMC to ignore it.
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*/
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dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
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pmc_core_send_ltr_ignore(pmcdev, 3);
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return 0;
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}
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@ -204,11 +204,31 @@ const struct pmc_reg_map cnp_reg_map = {
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.etr3_offset = ETR3_OFFSET,
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};
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void cnl_suspend(struct pmc_dev *pmcdev)
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{
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/*
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* Due to a hardware limitation, the GBE LTR blocks PC10
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* when a cable is attached. To unblock PC10 during suspend,
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* tell the PMC to ignore it.
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*/
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pmc_core_send_ltr_ignore(pmcdev, 3, 1);
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}
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int cnl_resume(struct pmc_dev *pmcdev)
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{
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pmc_core_send_ltr_ignore(pmcdev, 3, 0);
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return pmc_core_resume_common(pmcdev);
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}
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int cnp_core_init(struct pmc_dev *pmcdev)
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{
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struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN];
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int ret;
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pmcdev->suspend = cnl_suspend;
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pmcdev->resume = cnl_resume;
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pmc->map = &cnp_reg_map;
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ret = get_primary_reg_base(pmc);
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if (ret)
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@ -216,11 +236,5 @@ int cnp_core_init(struct pmc_dev *pmcdev)
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pmc_core_get_low_power_modes(pmcdev);
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/* Due to a hardware limitation, the GBE LTR blocks PC10
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* when a cable is attached. Tell the PMC to ignore it.
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*/
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dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
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pmc_core_send_ltr_ignore(pmcdev, 3);
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return 0;
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}
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@ -476,7 +476,7 @@ static int pmc_core_pll_show(struct seq_file *s, void *unused)
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}
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DEFINE_SHOW_ATTRIBUTE(pmc_core_pll);
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int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value)
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int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value, int ignore)
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{
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struct pmc *pmc;
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const struct pmc_reg_map *map;
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@ -488,7 +488,7 @@ int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value)
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* is based on the contiguous indexes from ltr_show output.
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* pmc index and ltr index needs to be calculated from it.
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*/
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for (pmc_index = 0; pmc_index < ARRAY_SIZE(pmcdev->pmcs) && ltr_index > 0; pmc_index++) {
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for (pmc_index = 0; pmc_index < ARRAY_SIZE(pmcdev->pmcs) && ltr_index >= 0; pmc_index++) {
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pmc = pmcdev->pmcs[pmc_index];
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if (!pmc)
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@ -514,7 +514,10 @@ int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value)
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mutex_lock(&pmcdev->lock);
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reg = pmc_core_reg_read(pmc, map->ltr_ignore_offset);
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reg |= BIT(ltr_index);
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if (ignore)
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reg |= BIT(ltr_index);
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else
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reg &= ~BIT(ltr_index);
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pmc_core_reg_write(pmc, map->ltr_ignore_offset, reg);
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mutex_unlock(&pmcdev->lock);
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@ -537,7 +540,7 @@ static ssize_t pmc_core_ltr_ignore_write(struct file *file,
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if (err)
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return err;
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err = pmc_core_send_ltr_ignore(pmcdev, value);
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err = pmc_core_send_ltr_ignore(pmcdev, value, 1);
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return err == 0 ? count : err;
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}
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@ -1430,6 +1433,9 @@ static __maybe_unused int pmc_core_suspend(struct device *dev)
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struct pmc_dev *pmcdev = dev_get_drvdata(dev);
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struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN];
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if (pmcdev->suspend)
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pmcdev->suspend(pmcdev);
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/* Check if the syspend will actually use S0ix */
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if (pm_suspend_via_firmware())
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return 0;
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@ -389,6 +389,7 @@ struct pmc {
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* @s0ix_counter: S0ix residency (step adjusted)
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* @num_lpm_modes: Count of enabled modes
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* @lpm_en_modes: Array of enabled modes from lowest to highest priority
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* @suspend: Function to perform platform specific suspend
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* @resume: Function to perform platform specific resume
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*
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* pmc_dev contains info about power management controller device.
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@ -406,6 +407,7 @@ struct pmc_dev {
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u64 s0ix_counter;
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int num_lpm_modes;
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int lpm_en_modes[LPM_MAX_NUM_MODES];
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void (*suspend)(struct pmc_dev *pmcdev);
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int (*resume)(struct pmc_dev *pmcdev);
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bool has_die_c6;
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@ -565,7 +567,7 @@ extern const struct pmc_reg_map arl_pchs_reg_map;
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extern void pmc_core_get_tgl_lpm_reqs(struct platform_device *pdev);
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extern int pmc_core_ssram_get_lpm_reqs(struct pmc_dev *pmcdev);
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extern int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value);
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int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value, int ignore);
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int pmc_core_resume_common(struct pmc_dev *pmcdev);
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int get_primary_reg_base(struct pmc *pmc);
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@ -586,6 +588,9 @@ int mtl_core_init(struct pmc_dev *pmcdev);
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int arl_core_init(struct pmc_dev *pmcdev);
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int lnl_core_init(struct pmc_dev *pmcdev);
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void cnl_suspend(struct pmc_dev *pmcdev);
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int cnl_resume(struct pmc_dev *pmcdev);
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#define pmc_for_each_mode(i, mode, pmcdev) \
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for (i = 0, mode = pmcdev->lpm_en_modes[i]; \
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i < pmcdev->num_lpm_modes; \
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|
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@ -986,6 +986,8 @@ static void mtl_d3_fixup(void)
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static int mtl_resume(struct pmc_dev *pmcdev)
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{
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mtl_d3_fixup();
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pmc_core_send_ltr_ignore(pmcdev, 3, 0);
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return pmc_core_resume_common(pmcdev);
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}
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@ -998,6 +1000,7 @@ int mtl_core_init(struct pmc_dev *pmcdev)
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mtl_d3_fixup();
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pmcdev->suspend = cnl_suspend;
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pmcdev->resume = mtl_resume;
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pmcdev->regmap_list = mtl_pmc_info_list;
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@ -1019,12 +1022,6 @@ int mtl_core_init(struct pmc_dev *pmcdev)
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pmc_core_get_low_power_modes(pmcdev);
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pmc_core_punit_pmt_init(pmcdev, MTL_PMT_DMU_GUID);
|
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|
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/* Due to a hardware limitation, the GBE LTR blocks PC10
|
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* when a cable is attached. Tell the PMC to ignore it.
|
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*/
|
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dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
|
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pmc_core_send_ltr_ignore(pmcdev, 3);
|
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|
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if (ssram_init)
|
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return pmc_core_ssram_get_lpm_reqs(pmcdev);
|
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|
||||
|
|
|
|||
|
|
@ -305,17 +305,15 @@ int tgl_core_generic_init(struct pmc_dev *pmcdev, int pch_tp)
|
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else
|
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pmc->map = &tgl_reg_map;
|
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|
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pmcdev->suspend = cnl_suspend;
|
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pmcdev->resume = cnl_resume;
|
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|
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ret = get_primary_reg_base(pmc);
|
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if (ret)
|
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return ret;
|
||||
|
||||
pmc_core_get_low_power_modes(pmcdev);
|
||||
pmc_core_get_tgl_lpm_reqs(pmcdev->pdev);
|
||||
/* Due to a hardware limitation, the GBE LTR blocks PC10
|
||||
* when a cable is attached. Tell the PMC to ignore it.
|
||||
*/
|
||||
dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n");
|
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pmc_core_send_ltr_ignore(pmcdev, 3);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -73,10 +73,10 @@ struct intel_vbtn_priv {
|
|||
bool wakeup_mode;
|
||||
};
|
||||
|
||||
static void detect_tablet_mode(struct platform_device *device)
|
||||
static void detect_tablet_mode(struct device *dev)
|
||||
{
|
||||
struct intel_vbtn_priv *priv = dev_get_drvdata(&device->dev);
|
||||
acpi_handle handle = ACPI_HANDLE(&device->dev);
|
||||
struct intel_vbtn_priv *priv = dev_get_drvdata(dev);
|
||||
acpi_handle handle = ACPI_HANDLE(dev);
|
||||
unsigned long long vgbs;
|
||||
acpi_status status;
|
||||
int m;
|
||||
|
|
@ -89,6 +89,8 @@ static void detect_tablet_mode(struct platform_device *device)
|
|||
input_report_switch(priv->switches_dev, SW_TABLET_MODE, m);
|
||||
m = (vgbs & VGBS_DOCK_MODE_FLAG) ? 1 : 0;
|
||||
input_report_switch(priv->switches_dev, SW_DOCK, m);
|
||||
|
||||
input_sync(priv->switches_dev);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -134,7 +136,7 @@ static int intel_vbtn_input_setup(struct platform_device *device)
|
|||
priv->switches_dev->id.bustype = BUS_HOST;
|
||||
|
||||
if (priv->has_switches) {
|
||||
detect_tablet_mode(device);
|
||||
detect_tablet_mode(&device->dev);
|
||||
|
||||
ret = input_register_device(priv->switches_dev);
|
||||
if (ret)
|
||||
|
|
@ -198,6 +200,9 @@ static void notify_handler(acpi_handle handle, u32 event, void *context)
|
|||
autorelease = val && (!ke_rel || ke_rel->type == KE_IGNORE);
|
||||
|
||||
sparse_keymap_report_event(input_dev, event, val, autorelease);
|
||||
|
||||
/* Some devices need this to report further events */
|
||||
acpi_evaluate_object(handle, "VBDL", NULL, NULL);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -352,7 +357,13 @@ static void intel_vbtn_pm_complete(struct device *dev)
|
|||
|
||||
static int intel_vbtn_pm_resume(struct device *dev)
|
||||
{
|
||||
struct intel_vbtn_priv *priv = dev_get_drvdata(dev);
|
||||
|
||||
intel_vbtn_pm_complete(dev);
|
||||
|
||||
if (priv->has_switches)
|
||||
detect_tablet_mode(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -590,6 +590,8 @@ static void ips_disable_gpu_turbo(struct ips_driver *ips)
|
|||
* @ips: IPS driver struct
|
||||
*
|
||||
* Check whether the MCP is over its thermal or power budget.
|
||||
*
|
||||
* Returns: %true if the temp or power has exceeded its maximum, else %false
|
||||
*/
|
||||
static bool mcp_exceeded(struct ips_driver *ips)
|
||||
{
|
||||
|
|
@ -619,6 +621,8 @@ static bool mcp_exceeded(struct ips_driver *ips)
|
|||
* @cpu: CPU number to check
|
||||
*
|
||||
* Check a given CPU's average temp or power is over its limit.
|
||||
*
|
||||
* Returns: %true if the temp or power has exceeded its maximum, else %false
|
||||
*/
|
||||
static bool cpu_exceeded(struct ips_driver *ips, int cpu)
|
||||
{
|
||||
|
|
@ -645,6 +649,8 @@ static bool cpu_exceeded(struct ips_driver *ips, int cpu)
|
|||
* @ips: IPS driver struct
|
||||
*
|
||||
* Check the MCH temp & power against their maximums.
|
||||
*
|
||||
* Returns: %true if the temp or power has exceeded its maximum, else %false
|
||||
*/
|
||||
static bool mch_exceeded(struct ips_driver *ips)
|
||||
{
|
||||
|
|
@ -742,12 +748,13 @@ static void update_turbo_limits(struct ips_driver *ips)
|
|||
* - down (at TDP limit)
|
||||
* - adjust both CPU and GPU down if possible
|
||||
*
|
||||
cpu+ gpu+ cpu+gpu- cpu-gpu+ cpu-gpu-
|
||||
cpu < gpu < cpu+gpu+ cpu+ gpu+ nothing
|
||||
cpu < gpu >= cpu+gpu-(mcp<) cpu+gpu-(mcp<) gpu- gpu-
|
||||
cpu >= gpu < cpu-gpu+(mcp<) cpu- cpu-gpu+(mcp<) cpu-
|
||||
cpu >= gpu >= cpu-gpu- cpu-gpu- cpu-gpu- cpu-gpu-
|
||||
* |cpu+ gpu+ cpu+gpu- cpu-gpu+ cpu-gpu-
|
||||
* cpu < gpu < |cpu+gpu+ cpu+ gpu+ nothing
|
||||
* cpu < gpu >= |cpu+gpu-(mcp<) cpu+gpu-(mcp<) gpu- gpu-
|
||||
* cpu >= gpu < |cpu-gpu+(mcp<) cpu- cpu-gpu+(mcp<) cpu-
|
||||
* cpu >= gpu >=|cpu-gpu- cpu-gpu- cpu-gpu- cpu-gpu-
|
||||
*
|
||||
* Returns: %0
|
||||
*/
|
||||
static int ips_adjust(void *data)
|
||||
{
|
||||
|
|
@ -935,11 +942,13 @@ static void monitor_timeout(struct timer_list *t)
|
|||
* @data: ips driver structure
|
||||
*
|
||||
* This is the main function for the IPS driver. It monitors power and
|
||||
* tempurature in the MCP and adjusts CPU and GPU power clams accordingly.
|
||||
* temperature in the MCP and adjusts CPU and GPU power clamps accordingly.
|
||||
*
|
||||
* We keep a 5s moving average of power consumption and tempurature. Using
|
||||
* We keep a 5s moving average of power consumption and temperature. Using
|
||||
* that data, along with CPU vs GPU preference, we adjust the power clamps
|
||||
* up or down.
|
||||
*
|
||||
* Returns: %0 on success or -errno on error
|
||||
*/
|
||||
static int ips_monitor(void *data)
|
||||
{
|
||||
|
|
@ -1113,6 +1122,8 @@ static int ips_monitor(void *data)
|
|||
* Handle temperature limit trigger events, generally by lowering the clamps.
|
||||
* If we're at a critical limit, we clamp back to the lowest possible value
|
||||
* to prevent emergency shutdown.
|
||||
*
|
||||
* Returns: IRQ_NONE or IRQ_HANDLED
|
||||
*/
|
||||
static irqreturn_t ips_irq_handler(int irq, void *arg)
|
||||
{
|
||||
|
|
@ -1260,9 +1271,12 @@ static void ips_debugfs_init(struct ips_driver *ips)
|
|||
|
||||
/**
|
||||
* ips_detect_cpu - detect whether CPU supports IPS
|
||||
* @ips: IPS driver struct
|
||||
*
|
||||
* Walk our list and see if we're on a supported CPU. If we find one,
|
||||
* return the limits for it.
|
||||
*
|
||||
* Returns: the &ips_mcp_limits struct that matches the boot CPU or %NULL
|
||||
*/
|
||||
static struct ips_mcp_limits *ips_detect_cpu(struct ips_driver *ips)
|
||||
{
|
||||
|
|
@ -1319,6 +1333,8 @@ static struct ips_mcp_limits *ips_detect_cpu(struct ips_driver *ips)
|
|||
* monitor and control graphics turbo mode. If we can find them, we can
|
||||
* enable graphics turbo, otherwise we must disable it to avoid exceeding
|
||||
* thermal and power limits in the MCP.
|
||||
*
|
||||
* Returns: %true if the required symbols are found, else %false
|
||||
*/
|
||||
static bool ips_get_i915_syms(struct ips_driver *ips)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -26,6 +26,21 @@ static const struct x86_cpu_id p2sb_cpu_ids[] = {
|
|||
{}
|
||||
};
|
||||
|
||||
/*
|
||||
* Cache BAR0 of P2SB device functions 0 to 7.
|
||||
* TODO: The constant 8 is the number of functions that PCI specification
|
||||
* defines. Same definitions exist tree-wide. Unify this definition and
|
||||
* the other definitions then move to include/uapi/linux/pci.h.
|
||||
*/
|
||||
#define NR_P2SB_RES_CACHE 8
|
||||
|
||||
struct p2sb_res_cache {
|
||||
u32 bus_dev_id;
|
||||
struct resource res;
|
||||
};
|
||||
|
||||
static struct p2sb_res_cache p2sb_resources[NR_P2SB_RES_CACHE];
|
||||
|
||||
static int p2sb_get_devfn(unsigned int *devfn)
|
||||
{
|
||||
unsigned int fn = P2SB_DEVFN_DEFAULT;
|
||||
|
|
@ -39,8 +54,16 @@ static int p2sb_get_devfn(unsigned int *devfn)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static bool p2sb_valid_resource(struct resource *res)
|
||||
{
|
||||
if (res->flags)
|
||||
return true;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Copy resource from the first BAR of the device in question */
|
||||
static int p2sb_read_bar0(struct pci_dev *pdev, struct resource *mem)
|
||||
static void p2sb_read_bar0(struct pci_dev *pdev, struct resource *mem)
|
||||
{
|
||||
struct resource *bar0 = &pdev->resource[0];
|
||||
|
||||
|
|
@ -56,47 +79,64 @@ static int p2sb_read_bar0(struct pci_dev *pdev, struct resource *mem)
|
|||
mem->end = bar0->end;
|
||||
mem->flags = bar0->flags;
|
||||
mem->desc = bar0->desc;
|
||||
}
|
||||
|
||||
static void p2sb_scan_and_cache_devfn(struct pci_bus *bus, unsigned int devfn)
|
||||
{
|
||||
struct p2sb_res_cache *cache = &p2sb_resources[PCI_FUNC(devfn)];
|
||||
struct pci_dev *pdev;
|
||||
|
||||
pdev = pci_scan_single_device(bus, devfn);
|
||||
if (!pdev)
|
||||
return;
|
||||
|
||||
p2sb_read_bar0(pdev, &cache->res);
|
||||
cache->bus_dev_id = bus->dev.id;
|
||||
|
||||
pci_stop_and_remove_bus_device(pdev);
|
||||
return;
|
||||
}
|
||||
|
||||
static int p2sb_scan_and_cache(struct pci_bus *bus, unsigned int devfn)
|
||||
{
|
||||
unsigned int slot, fn;
|
||||
|
||||
if (PCI_FUNC(devfn) == 0) {
|
||||
/*
|
||||
* When function number of the P2SB device is zero, scan it and
|
||||
* other function numbers, and if devices are available, cache
|
||||
* their BAR0s.
|
||||
*/
|
||||
slot = PCI_SLOT(devfn);
|
||||
for (fn = 0; fn < NR_P2SB_RES_CACHE; fn++)
|
||||
p2sb_scan_and_cache_devfn(bus, PCI_DEVFN(slot, fn));
|
||||
} else {
|
||||
/* Scan the P2SB device and cache its BAR0 */
|
||||
p2sb_scan_and_cache_devfn(bus, devfn);
|
||||
}
|
||||
|
||||
if (!p2sb_valid_resource(&p2sb_resources[PCI_FUNC(devfn)].res))
|
||||
return -ENOENT;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int p2sb_scan_and_read(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
|
||||
static struct pci_bus *p2sb_get_bus(struct pci_bus *bus)
|
||||
{
|
||||
struct pci_dev *pdev;
|
||||
int ret;
|
||||
static struct pci_bus *p2sb_bus;
|
||||
|
||||
pdev = pci_scan_single_device(bus, devfn);
|
||||
if (!pdev)
|
||||
return -ENODEV;
|
||||
bus = bus ?: p2sb_bus;
|
||||
if (bus)
|
||||
return bus;
|
||||
|
||||
ret = p2sb_read_bar0(pdev, mem);
|
||||
|
||||
pci_stop_and_remove_bus_device(pdev);
|
||||
return ret;
|
||||
/* Assume P2SB is on the bus 0 in domain 0 */
|
||||
p2sb_bus = pci_find_bus(0, 0);
|
||||
return p2sb_bus;
|
||||
}
|
||||
|
||||
/**
|
||||
* p2sb_bar - Get Primary to Sideband (P2SB) bridge device BAR
|
||||
* @bus: PCI bus to communicate with
|
||||
* @devfn: PCI slot and function to communicate with
|
||||
* @mem: memory resource to be filled in
|
||||
*
|
||||
* The BIOS prevents the P2SB device from being enumerated by the PCI
|
||||
* subsystem, so we need to unhide and hide it back to lookup the BAR.
|
||||
*
|
||||
* if @bus is NULL, the bus 0 in domain 0 will be used.
|
||||
* If @devfn is 0, it will be replaced by devfn of the P2SB device.
|
||||
*
|
||||
* Caller must provide a valid pointer to @mem.
|
||||
*
|
||||
* Locking is handled by pci_rescan_remove_lock mutex.
|
||||
*
|
||||
* Return:
|
||||
* 0 on success or appropriate errno value on error.
|
||||
*/
|
||||
int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
|
||||
static int p2sb_cache_resources(void)
|
||||
{
|
||||
struct pci_dev *pdev_p2sb;
|
||||
struct pci_bus *bus;
|
||||
unsigned int devfn_p2sb;
|
||||
u32 value = P2SBC_HIDE;
|
||||
int ret;
|
||||
|
|
@ -106,8 +146,9 @@ int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* if @bus is NULL, use bus 0 in domain 0 */
|
||||
bus = bus ?: pci_find_bus(0, 0);
|
||||
bus = p2sb_get_bus(NULL);
|
||||
if (!bus)
|
||||
return -ENODEV;
|
||||
|
||||
/*
|
||||
* Prevent concurrent PCI bus scan from seeing the P2SB device and
|
||||
|
|
@ -115,17 +156,16 @@ int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
|
|||
*/
|
||||
pci_lock_rescan_remove();
|
||||
|
||||
/* Unhide the P2SB device, if needed */
|
||||
/*
|
||||
* The BIOS prevents the P2SB device from being enumerated by the PCI
|
||||
* subsystem, so we need to unhide and hide it back to lookup the BAR.
|
||||
* Unhide the P2SB device here, if needed.
|
||||
*/
|
||||
pci_bus_read_config_dword(bus, devfn_p2sb, P2SBC, &value);
|
||||
if (value & P2SBC_HIDE)
|
||||
pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, 0);
|
||||
|
||||
pdev_p2sb = pci_scan_single_device(bus, devfn_p2sb);
|
||||
if (devfn)
|
||||
ret = p2sb_scan_and_read(bus, devfn, mem);
|
||||
else
|
||||
ret = p2sb_read_bar0(pdev_p2sb, mem);
|
||||
pci_stop_and_remove_bus_device(pdev_p2sb);
|
||||
ret = p2sb_scan_and_cache(bus, devfn_p2sb);
|
||||
|
||||
/* Hide the P2SB device, if it was hidden */
|
||||
if (value & P2SBC_HIDE)
|
||||
|
|
@ -133,12 +173,62 @@ int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
|
|||
|
||||
pci_unlock_rescan_remove();
|
||||
|
||||
if (ret)
|
||||
return ret;
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (mem->flags == 0)
|
||||
/**
|
||||
* p2sb_bar - Get Primary to Sideband (P2SB) bridge device BAR
|
||||
* @bus: PCI bus to communicate with
|
||||
* @devfn: PCI slot and function to communicate with
|
||||
* @mem: memory resource to be filled in
|
||||
*
|
||||
* If @bus is NULL, the bus 0 in domain 0 will be used.
|
||||
* If @devfn is 0, it will be replaced by devfn of the P2SB device.
|
||||
*
|
||||
* Caller must provide a valid pointer to @mem.
|
||||
*
|
||||
* Return:
|
||||
* 0 on success or appropriate errno value on error.
|
||||
*/
|
||||
int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
|
||||
{
|
||||
struct p2sb_res_cache *cache;
|
||||
int ret;
|
||||
|
||||
bus = p2sb_get_bus(bus);
|
||||
if (!bus)
|
||||
return -ENODEV;
|
||||
|
||||
if (!devfn) {
|
||||
ret = p2sb_get_devfn(&devfn);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
cache = &p2sb_resources[PCI_FUNC(devfn)];
|
||||
if (cache->bus_dev_id != bus->dev.id)
|
||||
return -ENODEV;
|
||||
|
||||
if (!p2sb_valid_resource(&cache->res))
|
||||
return -ENOENT;
|
||||
|
||||
memcpy(mem, &cache->res, sizeof(*mem));
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(p2sb_bar);
|
||||
|
||||
static int __init p2sb_fs_init(void)
|
||||
{
|
||||
p2sb_cache_resources();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* pci_rescan_remove_lock to avoid access to unhidden P2SB devices can
|
||||
* not be locked in sysfs pci bus rescan path because of deadlock. To
|
||||
* avoid the deadlock, access to P2SB devices with the lock at an early
|
||||
* step in kernel initialization and cache required resources. This
|
||||
* should happen after subsys_initcall which initializes PCI subsystem
|
||||
* and before device_initcall which requires P2SB resources.
|
||||
*/
|
||||
fs_initcall(p2sb_fs_init);
|
||||
|
|
|
|||
|
|
@ -512,10 +512,10 @@ struct tpacpi_quirk {
|
|||
* Iterates over a quirks list until one is found that matches the
|
||||
* ThinkPad's vendor, BIOS and EC model.
|
||||
*
|
||||
* Returns 0 if nothing matches, otherwise returns the quirks field of
|
||||
* Returns: %0 if nothing matches, otherwise returns the quirks field of
|
||||
* the matching &struct tpacpi_quirk entry.
|
||||
*
|
||||
* The match criteria is: vendor, ec and bios much match.
|
||||
* The match criteria is: vendor, ec and bios must match.
|
||||
*/
|
||||
static unsigned long __init tpacpi_check_quirks(
|
||||
const struct tpacpi_quirk *qlist,
|
||||
|
|
@ -7948,8 +7948,19 @@ static struct ibm_struct volume_driver_data = {
|
|||
* TPACPI_FAN_WR_TPEC is also available and should be used to
|
||||
* command the fan. The X31/X40/X41 seems to have 8 fan levels,
|
||||
* but the ACPI tables just mention level 7.
|
||||
*
|
||||
* TPACPI_FAN_RD_TPEC_NS:
|
||||
* This mode is used for a few ThinkPads (L13 Yoga Gen2, X13 Yoga Gen2 etc.)
|
||||
* that are using non-standard EC locations for reporting fan speeds.
|
||||
* Currently these platforms only provide fan rpm reporting.
|
||||
*
|
||||
*/
|
||||
|
||||
#define FAN_RPM_CAL_CONST 491520 /* FAN RPM calculation offset for some non-standard ECFW */
|
||||
|
||||
#define FAN_NS_CTRL_STATUS BIT(2) /* Bit which determines control is enabled or not */
|
||||
#define FAN_NS_CTRL BIT(4) /* Bit which determines control is by host or EC */
|
||||
|
||||
enum { /* Fan control constants */
|
||||
fan_status_offset = 0x2f, /* EC register 0x2f */
|
||||
fan_rpm_offset = 0x84, /* EC register 0x84: LSB, 0x85 MSB (RPM)
|
||||
|
|
@ -7957,6 +7968,11 @@ enum { /* Fan control constants */
|
|||
fan_select_offset = 0x31, /* EC register 0x31 (Firmware 7M)
|
||||
bit 0 selects which fan is active */
|
||||
|
||||
fan_status_offset_ns = 0x93, /* Special status/control offset for non-standard EC Fan1 */
|
||||
fan2_status_offset_ns = 0x96, /* Special status/control offset for non-standard EC Fan2 */
|
||||
fan_rpm_status_ns = 0x95, /* Special offset for Fan1 RPM status for non-standard EC */
|
||||
fan2_rpm_status_ns = 0x98, /* Special offset for Fan2 RPM status for non-standard EC */
|
||||
|
||||
TP_EC_FAN_FULLSPEED = 0x40, /* EC fan mode: full speed */
|
||||
TP_EC_FAN_AUTO = 0x80, /* EC fan mode: auto fan control */
|
||||
|
||||
|
|
@ -7967,6 +7983,7 @@ enum fan_status_access_mode {
|
|||
TPACPI_FAN_NONE = 0, /* No fan status or control */
|
||||
TPACPI_FAN_RD_ACPI_GFAN, /* Use ACPI GFAN */
|
||||
TPACPI_FAN_RD_TPEC, /* Use ACPI EC regs 0x2f, 0x84-0x85 */
|
||||
TPACPI_FAN_RD_TPEC_NS, /* Use non-standard ACPI EC regs (eg: L13 Yoga gen2 etc.) */
|
||||
};
|
||||
|
||||
enum fan_control_access_mode {
|
||||
|
|
@ -7994,6 +8011,8 @@ static u8 fan_control_desired_level;
|
|||
static u8 fan_control_resume_level;
|
||||
static int fan_watchdog_maxinterval;
|
||||
|
||||
static bool fan_with_ns_addr;
|
||||
|
||||
static struct mutex fan_mutex;
|
||||
|
||||
static void fan_watchdog_fire(struct work_struct *ignored);
|
||||
|
|
@ -8123,6 +8142,15 @@ static int fan_get_status(u8 *status)
|
|||
}
|
||||
|
||||
break;
|
||||
case TPACPI_FAN_RD_TPEC_NS:
|
||||
/* Default mode is AUTO which means controlled by EC */
|
||||
if (!acpi_ec_read(fan_status_offset_ns, &s))
|
||||
return -EIO;
|
||||
|
||||
if (status)
|
||||
*status = s;
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
return -ENXIO;
|
||||
|
|
@ -8139,7 +8167,8 @@ static int fan_get_status_safe(u8 *status)
|
|||
if (mutex_lock_killable(&fan_mutex))
|
||||
return -ERESTARTSYS;
|
||||
rc = fan_get_status(&s);
|
||||
if (!rc)
|
||||
/* NS EC doesn't have register with level settings */
|
||||
if (!rc && !fan_with_ns_addr)
|
||||
fan_update_desired_level(s);
|
||||
mutex_unlock(&fan_mutex);
|
||||
|
||||
|
|
@ -8166,7 +8195,13 @@ static int fan_get_speed(unsigned int *speed)
|
|||
|
||||
if (likely(speed))
|
||||
*speed = (hi << 8) | lo;
|
||||
break;
|
||||
case TPACPI_FAN_RD_TPEC_NS:
|
||||
if (!acpi_ec_read(fan_rpm_status_ns, &lo))
|
||||
return -EIO;
|
||||
|
||||
if (speed)
|
||||
*speed = lo ? FAN_RPM_CAL_CONST / lo : 0;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
@ -8178,7 +8213,7 @@ static int fan_get_speed(unsigned int *speed)
|
|||
|
||||
static int fan2_get_speed(unsigned int *speed)
|
||||
{
|
||||
u8 hi, lo;
|
||||
u8 hi, lo, status;
|
||||
bool rc;
|
||||
|
||||
switch (fan_status_access_mode) {
|
||||
|
|
@ -8194,7 +8229,21 @@ static int fan2_get_speed(unsigned int *speed)
|
|||
|
||||
if (likely(speed))
|
||||
*speed = (hi << 8) | lo;
|
||||
break;
|
||||
|
||||
case TPACPI_FAN_RD_TPEC_NS:
|
||||
rc = !acpi_ec_read(fan2_status_offset_ns, &status);
|
||||
if (rc)
|
||||
return -EIO;
|
||||
if (!(status & FAN_NS_CTRL_STATUS)) {
|
||||
pr_info("secondary fan control not supported\n");
|
||||
return -EIO;
|
||||
}
|
||||
rc = !acpi_ec_read(fan2_rpm_status_ns, &lo);
|
||||
if (rc)
|
||||
return -EIO;
|
||||
if (speed)
|
||||
*speed = lo ? FAN_RPM_CAL_CONST / lo : 0;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
@ -8697,6 +8746,7 @@ static const struct attribute_group fan_driver_attr_group = {
|
|||
#define TPACPI_FAN_2FAN 0x0002 /* EC 0x31 bit 0 selects fan2 */
|
||||
#define TPACPI_FAN_2CTL 0x0004 /* selects fan2 control */
|
||||
#define TPACPI_FAN_NOFAN 0x0008 /* no fan available */
|
||||
#define TPACPI_FAN_NS 0x0010 /* For EC with non-Standard register addresses */
|
||||
|
||||
static const struct tpacpi_quirk fan_quirk_table[] __initconst = {
|
||||
TPACPI_QEC_IBM('1', 'Y', TPACPI_FAN_Q1),
|
||||
|
|
@ -8715,6 +8765,8 @@ static const struct tpacpi_quirk fan_quirk_table[] __initconst = {
|
|||
TPACPI_Q_LNV3('N', '2', 'O', TPACPI_FAN_2CTL), /* P1 / X1 Extreme (2nd gen) */
|
||||
TPACPI_Q_LNV3('N', '3', '0', TPACPI_FAN_2CTL), /* P15 (1st gen) / P15v (1st gen) */
|
||||
TPACPI_Q_LNV3('N', '3', '7', TPACPI_FAN_2CTL), /* T15g (2nd gen) */
|
||||
TPACPI_Q_LNV3('R', '1', 'F', TPACPI_FAN_NS), /* L13 Yoga Gen 2 */
|
||||
TPACPI_Q_LNV3('N', '2', 'U', TPACPI_FAN_NS), /* X13 Yoga Gen 2*/
|
||||
TPACPI_Q_LNV3('N', '1', 'O', TPACPI_FAN_NOFAN), /* X1 Tablet (2nd gen) */
|
||||
};
|
||||
|
||||
|
|
@ -8749,18 +8801,27 @@ static int __init fan_init(struct ibm_init_struct *iibm)
|
|||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (quirks & TPACPI_FAN_NS) {
|
||||
pr_info("ECFW with non-standard fan reg control found\n");
|
||||
fan_with_ns_addr = 1;
|
||||
/* Fan ctrl support from host is undefined for now */
|
||||
tp_features.fan_ctrl_status_undef = 1;
|
||||
}
|
||||
|
||||
if (gfan_handle) {
|
||||
/* 570, 600e/x, 770e, 770x */
|
||||
fan_status_access_mode = TPACPI_FAN_RD_ACPI_GFAN;
|
||||
} else {
|
||||
/* all other ThinkPads: note that even old-style
|
||||
* ThinkPad ECs supports the fan control register */
|
||||
if (likely(acpi_ec_read(fan_status_offset,
|
||||
&fan_control_initial_status))) {
|
||||
if (fan_with_ns_addr ||
|
||||
likely(acpi_ec_read(fan_status_offset, &fan_control_initial_status))) {
|
||||
int res;
|
||||
unsigned int speed;
|
||||
|
||||
fan_status_access_mode = TPACPI_FAN_RD_TPEC;
|
||||
fan_status_access_mode = fan_with_ns_addr ?
|
||||
TPACPI_FAN_RD_TPEC_NS : TPACPI_FAN_RD_TPEC;
|
||||
|
||||
if (quirks & TPACPI_FAN_Q1)
|
||||
fan_quirk1_setup();
|
||||
/* Try and probe the 2nd fan */
|
||||
|
|
@ -8769,7 +8830,8 @@ static int __init fan_init(struct ibm_init_struct *iibm)
|
|||
if (res >= 0 && speed != FAN_NOT_PRESENT) {
|
||||
/* It responded - so let's assume it's there */
|
||||
tp_features.second_fan = 1;
|
||||
tp_features.second_fan_ctl = 1;
|
||||
/* fan control not currently available for ns ECFW */
|
||||
tp_features.second_fan_ctl = !fan_with_ns_addr;
|
||||
pr_info("secondary fan control detected & enabled\n");
|
||||
} else {
|
||||
/* Fan not auto-detected */
|
||||
|
|
@ -8944,6 +9006,7 @@ static int fan_read(struct seq_file *m)
|
|||
str_enabled_disabled(status), status);
|
||||
break;
|
||||
|
||||
case TPACPI_FAN_RD_TPEC_NS:
|
||||
case TPACPI_FAN_RD_TPEC:
|
||||
/* all except 570, 600e/x, 770e, 770x */
|
||||
rc = fan_get_status_safe(&status);
|
||||
|
|
@ -8958,13 +9021,22 @@ static int fan_read(struct seq_file *m)
|
|||
|
||||
seq_printf(m, "speed:\t\t%d\n", speed);
|
||||
|
||||
if (status & TP_EC_FAN_FULLSPEED)
|
||||
/* Disengaged mode takes precedence */
|
||||
seq_printf(m, "level:\t\tdisengaged\n");
|
||||
else if (status & TP_EC_FAN_AUTO)
|
||||
seq_printf(m, "level:\t\tauto\n");
|
||||
else
|
||||
seq_printf(m, "level:\t\t%d\n", status);
|
||||
if (fan_status_access_mode == TPACPI_FAN_RD_TPEC_NS) {
|
||||
/*
|
||||
* No full speed bit in NS EC
|
||||
* EC Auto mode is set by default.
|
||||
* No other levels settings available
|
||||
*/
|
||||
seq_printf(m, "level:\t\t%s\n", status & FAN_NS_CTRL ? "unknown" : "auto");
|
||||
} else {
|
||||
if (status & TP_EC_FAN_FULLSPEED)
|
||||
/* Disengaged mode takes precedence */
|
||||
seq_printf(m, "level:\t\tdisengaged\n");
|
||||
else if (status & TP_EC_FAN_AUTO)
|
||||
seq_printf(m, "level:\t\tauto\n");
|
||||
else
|
||||
seq_printf(m, "level:\t\t%d\n", status);
|
||||
}
|
||||
break;
|
||||
|
||||
case TPACPI_FAN_NONE:
|
||||
|
|
@ -9303,7 +9375,7 @@ static struct tpacpi_battery_driver_data battery_info;
|
|||
|
||||
/* ACPI helpers/functions/probes */
|
||||
|
||||
/**
|
||||
/*
|
||||
* This evaluates a ACPI method call specific to the battery
|
||||
* ACPI extension. The specifics are that an error is marked
|
||||
* in the 32rd bit of the response, so we just check that here.
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user