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i3c: master: svc: Fix npcm845 DAA process corruption

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When MCONFIG.SKEW=0 and MCONFIG.ODHPP=0, the ENTDAA transaction gets
corrupted and results in a no repeated-start condition at the end of
address assignment.

Workaround: Set MCONFIG.SKEW to 1 before initiating the DAA process.
After the DAA process is completed, return MCONFIG.SKEW to its previous
value.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Link: https://lore.kernel.org/r/20250306075429.2265183-6-yschu@nuvoton.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Stanley Chu 2025-03-06 15:54:29 +08:00 committed by Alexandre Belloni
parent 4dd12e944f
commit 2a785307e4
1 changed files with 29 additions and 1 deletions
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30
drivers/i3c/master/svc-i3c-master.c
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@ -32,6 +32,7 @@
#define SVC_I3C_MCONFIG_ODBAUD(x) FIELD_PREP(GENMASK(23, 16), (x))
#define SVC_I3C_MCONFIG_ODHPP(x) FIELD_PREP(BIT(24), (x))
#define SVC_I3C_MCONFIG_SKEW(x) FIELD_PREP(GENMASK(27, 25), (x))
#define SVC_I3C_MCONFIG_SKEW_MASK GENMASK(27, 25)
#define SVC_I3C_MCONFIG_I2CBAUD(x) FIELD_PREP(GENMASK(31, 28), (x))
#define SVC_I3C_MCTRL 0x084
@ -150,6 +151,16 @@
* If it is a true SlvStart, the MSTATUS state is SLVREQ.
*/
#define SVC_I3C_QUIRK_FALSE_SLVSTART BIT(1)
/*
* SVC_I3C_QUIRK_DAA_CORRUPT:
* When MCONFIG.SKEW=0 and MCONFIG.ODHPP=0, the ENTDAA transaction gets
* corrupted and results in a no repeated-start condition at the end of
* address assignment.
* Workaround:
* Set MCONFIG.SKEW to 1 before initiating the DAA process. After the DAA
* process is completed, return MCONFIG.SKEW to its previous value.
*/
#define SVC_I3C_QUIRK_DAA_CORRUPT BIT(2)
struct svc_i3c_cmd {
u8 addr;
@ -259,6 +270,13 @@ static inline bool svc_has_quirk(struct svc_i3c_master *master, u32 quirk)
return (master->drvdata->quirks & quirk);
}
static inline bool svc_has_daa_corrupt(struct svc_i3c_master *master)
{
return ((master->drvdata->quirks & SVC_I3C_QUIRK_DAA_CORRUPT) &&
!(master->mctrl_config &
(SVC_I3C_MCONFIG_SKEW_MASK | SVC_I3C_MCONFIG_ODHPP(1))));
}
static inline bool is_events_enabled(struct svc_i3c_master *master, u32 mask)
{
return !!(master->enabled_events & mask);
@ -1146,7 +1164,16 @@ static int svc_i3c_master_do_daa(struct i3c_master_controller *m)
}
spin_lock_irqsave(&master->xferqueue.lock, flags);
if (svc_has_daa_corrupt(master))
writel(master->mctrl_config | SVC_I3C_MCONFIG_SKEW(1),
master->regs + SVC_I3C_MCONFIG);
ret = svc_i3c_master_do_daa_locked(master, addrs, &dev_nb);
if (svc_has_daa_corrupt(master))
writel(master->mctrl_config, master->regs + SVC_I3C_MCONFIG);
spin_unlock_irqrestore(&master->xferqueue.lock, flags);
svc_i3c_master_clear_merrwarn(master);
@ -2033,7 +2060,8 @@ static const struct dev_pm_ops svc_i3c_pm_ops = {
static const struct svc_i3c_drvdata npcm845_drvdata = {
.quirks = SVC_I3C_QUIRK_FIFO_EMPTY |
SVC_I3C_QUIRK_FALSE_SLVSTART,
SVC_I3C_QUIRK_FALSE_SLVSTART |
SVC_I3C_QUIRK_DAA_CORRUPT,
};
static const struct svc_i3c_drvdata svc_default_drvdata = {};