From 2a3fa7f31f43580edcba5ee9f97473801aa3deec Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Fri, 5 Jun 2026 23:16:43 +0200 Subject: [PATCH] irqchip/irq-realtek-rtl: Add mask for interrupt handling When using multiple domains for the Interrupt controller, each one must know which hardware interrupts it serves. Add a mask that is filled during setup and apply it during interrupt handling. Signed-off-by: Markus Stockhausen Signed-off-by: Thomas Gleixner Link: https://patch.msgid.link/20260605211646.2101652-5-markus.stockhausen@gmx.de --- drivers/irqchip/irq-realtek-rtl.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-realtek-rtl.c b/drivers/irqchip/irq-realtek-rtl.c index 547f21da3edc..9f792d4cb503 100644 --- a/drivers/irqchip/irq-realtek-rtl.c +++ b/drivers/irqchip/irq-realtek-rtl.c @@ -27,6 +27,7 @@ struct realtek_ictl_output { struct irq_domain *domain; + u32 mask; }; static DEFINE_RAW_SPINLOCK(irq_lock); @@ -109,15 +110,17 @@ static struct irq_chip realtek_ictl_irq = { .irq_set_affinity = realtek_ictl_irq_affinity, }; -static int intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) +static int intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw_irq) { + struct realtek_ictl_output *output = d->host_data; unsigned int cpu; irq_set_chip_and_handler(irq, &realtek_ictl_irq, handle_level_irq); guard(raw_spinlock_irqsave)(&irq_lock); + output->mask |= BIT(hw_irq); for_each_present_cpu(cpu) - write_irr(cpu, hw, 1); + write_irr(cpu, hw_irq, 1); return 0; } @@ -136,7 +139,7 @@ static void realtek_irq_dispatch(struct irq_desc *desc) unsigned int hw_irq; chained_irq_enter(chip, desc); - pending = readl(REG(cpu, RTL_ICTL_GIMR)) & readl(REG(cpu, RTL_ICTL_GISR)); + pending = readl(REG(cpu, RTL_ICTL_GIMR)) & readl(REG(cpu, RTL_ICTL_GISR)) & output->mask; if (unlikely(!pending)) { spurious_interrupt();