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drm/i915: Implement .min_plane_width() for PTL+
PTL+ spposedly still has the same plane min width limit as ADL. Check for it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20251009211313.30234-4-ville.syrjala@linux.intel.com Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
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@ -2819,6 +2819,7 @@ skl_universal_plane_create(struct intel_display *display,
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intel_fbc_add_plane(skl_plane_fbc(display, pipe, plane_id), plane);
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if (DISPLAY_VER(display) >= 30) {
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plane->min_width = adl_plane_min_width;
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plane->max_width = xe3_plane_max_width;
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plane->max_height = icl_plane_max_height;
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plane->min_cdclk = icl_plane_min_cdclk;
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