drm/i915: Implement .min_plane_width() for PTL+

PTL+ spposedly still has the same plane min width limit
as ADL. Check for it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251009211313.30234-4-ville.syrjala@linux.intel.com
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
This commit is contained in:
Ville Syrjälä 2025-10-10 00:13:07 +03:00
parent 369c8f97fb
commit 299843cd7b

View File

@ -2819,6 +2819,7 @@ skl_universal_plane_create(struct intel_display *display,
intel_fbc_add_plane(skl_plane_fbc(display, pipe, plane_id), plane);
if (DISPLAY_VER(display) >= 30) {
plane->min_width = adl_plane_min_width;
plane->max_width = xe3_plane_max_width;
plane->max_height = icl_plane_max_height;
plane->min_cdclk = icl_plane_min_cdclk;