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drm/rockchip: vop2: Add YUV support to background color
The VOP2 background color must be programmed with 10-bit precision, using YUV format when the overlay operates in YUV mode, and RGB otherwise. Add the required RGB-to-YCbCr conversion logic, covering all color spaces supported by the display controller: BT601L, BT601F, BT709L and BT2020L. Since the color is currently programmed to hardware on every atomic commit, minimize the computation cost by splitting the work across the two paths: in atomic_enable(), perform the conversion unconditionally (the hardware state is unknown after power-on), while in atomic_flush(), perform it only when the DRM property has actually changed. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Acked-by: Andy Yan <andyshrk@163.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260601-vop2-bg-yuv-v2-2-e5aef1d16fec@collabora.com
This commit is contained in:
Cristian Ciocaltea
Heiko Stuebner
parent
09dfa47fc5
commit
28e670a088
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@ -728,6 +728,89 @@ static void vop2_setup_csc_mode(struct vop2_video_port *vp,
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vop2_win_write(win, VOP2_WIN_CSC_MODE, csc_mode);
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}
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/*
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* RGB-to-YCbCr conversion based on color_to_ycbcr() and rgb2ycbcr() from
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* drivers/media/common/v4l2-tpg/v4l2-tpg-core.c.
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*
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* Limited-range Y offset & chroma midpoint are expressed in 16-bit space.
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*/
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#define RGB2YUV_LIMITED_Y_OFFSET (16 << 8)
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#define RGB2YUV_CHROMA_OFFSET (128 << 8)
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#define COEFF(v, r) ((s32)(0.5 + (v) * (r) * 256.0))
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struct rgb2yuv_matrix {
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s32 y_r, y_g, y_b;
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s32 cb_r, cb_g, cb_b;
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s32 cr_r, cr_g, cr_b;
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s32 y_offset;
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};
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/* BT.601 Limited range */
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static const struct rgb2yuv_matrix rgb2yuv_bt601l = {
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.y_r = COEFF(0.299, 219), .y_g = COEFF(0.587, 219), .y_b = COEFF(0.114, 219),
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.cb_r = COEFF(-0.1687, 224), .cb_g = COEFF(-0.3313, 224), .cb_b = COEFF(0.5, 224),
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.cr_r = COEFF(0.5, 224), .cr_g = COEFF(-0.4187, 224), .cr_b = COEFF(-0.0813, 224),
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.y_offset = RGB2YUV_LIMITED_Y_OFFSET,
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};
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/* BT.601 Full range */
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static const struct rgb2yuv_matrix rgb2yuv_bt601f = {
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.y_r = COEFF(0.299, 255), .y_g = COEFF(0.587, 255), .y_b = COEFF(0.114, 255),
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.cb_r = COEFF(-0.1687, 255), .cb_g = COEFF(-0.3313, 255), .cb_b = COEFF(0.5, 255),
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.cr_r = COEFF(0.5, 255), .cr_g = COEFF(-0.4187, 255), .cr_b = COEFF(-0.0813, 255),
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.y_offset = 0,
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};
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/* BT.709 Limited range */
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static const struct rgb2yuv_matrix rgb2yuv_bt709l = {
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.y_r = COEFF(0.2126, 219), .y_g = COEFF(0.7152, 219), .y_b = COEFF(0.0722, 219),
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.cb_r = COEFF(-0.1146, 224), .cb_g = COEFF(-0.3854, 224), .cb_b = COEFF(0.5, 224),
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.cr_r = COEFF(0.5, 224), .cr_g = COEFF(-0.4542, 224), .cr_b = COEFF(-0.0458, 224),
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.y_offset = RGB2YUV_LIMITED_Y_OFFSET,
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};
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/* BT.2020 Limited range */
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static const struct rgb2yuv_matrix rgb2yuv_bt2020l = {
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.y_r = COEFF(0.2627, 219), .y_g = COEFF(0.6780, 219), .y_b = COEFF(0.0593, 219),
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.cb_r = COEFF(-0.1396, 224), .cb_g = COEFF(-0.3604, 224), .cb_b = COEFF(0.5, 224),
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.cr_r = COEFF(0.5, 224), .cr_g = COEFF(-0.4598, 224), .cr_b = COEFF(-0.0402, 224),
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.y_offset = RGB2YUV_LIMITED_Y_OFFSET,
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};
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static const struct rgb2yuv_matrix *
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vop2_rgb2yuv_get_matrix(enum vop_csc_format csc)
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{
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switch (csc) {
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case CSC_BT601L:
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return &rgb2yuv_bt601l;
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case CSC_BT601F:
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return &rgb2yuv_bt601f;
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case CSC_BT2020L:
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return &rgb2yuv_bt2020l;
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case CSC_BT709L:
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default:
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return &rgb2yuv_bt709l;
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}
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}
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/* Convert an RGB (16bpc) to YUV444 (16bpc). */
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static void vop2_rgb16_to_yuv16(int v4l2_cs, u16 r, u16 g, u16 b,
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u16 *y, u16 *cb, u16 *cr)
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{
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enum vop_csc_format csc = vop2_convert_csc_mode(v4l2_cs);
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const struct rgb2yuv_matrix *m = vop2_rgb2yuv_get_matrix(csc);
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s64 rs = r, gs = g, bs = b;
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s64 ys, cbs, crs;
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ys = m->y_r * rs + m->y_g * gs + m->y_b * bs;
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cbs = m->cb_r * rs + m->cb_g * gs + m->cb_b * bs;
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crs = m->cr_r * rs + m->cr_g * gs + m->cr_b * bs;
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*y = (ys >> 16) + m->y_offset;
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*cb = (cbs >> 16) + RGB2YUV_CHROMA_OFFSET;
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*cr = (crs >> 16) + RGB2YUV_CHROMA_OFFSET;
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}
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static void vop2_crtc_enable_irq(struct vop2_video_port *vp, u32 irq)
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{
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struct vop2 *vop2 = vp->vop2;
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@ -1554,12 +1637,58 @@ static void vop2_dither_setup(struct drm_crtc *crtc, u32 *dsp_ctrl)
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DITHER_DOWN_ALLEGRO);
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}
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static void vop2_post_config(struct drm_crtc *crtc)
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static void vop2_bgcolor_setup(struct drm_crtc *crtc, bool force,
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struct drm_crtc_state *new_crtc_state,
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struct drm_crtc_state *old_crtc_state)
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{
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struct rockchip_crtc_state *new_vcstate = to_rockchip_crtc_state(new_crtc_state);
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struct rockchip_crtc_state *old_vcstate = to_rockchip_crtc_state(old_crtc_state);
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struct vop2_video_port *vp = to_vop2_video_port(crtc);
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u64 bgcolor = new_crtc_state->background_color;
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u16 y, cb, cr;
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u32 val;
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if (!force && old_crtc_state->background_color == bgcolor &&
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old_vcstate->color_space == new_vcstate->color_space)
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return;
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/*
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* Background color is programmed with 10 bits of precision, using YUV
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* format when operating in YUV overlay mode, and RGB otherwise.
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*/
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if (new_vcstate->yuv_overlay) {
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vop2_rgb16_to_yuv16(new_vcstate->color_space,
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DRM_ARGB64_GETR(bgcolor),
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DRM_ARGB64_GETG(bgcolor),
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DRM_ARGB64_GETB(bgcolor),
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&y, &cb, &cr);
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val = FIELD_PREP(RK3568_VP_DSP_BG__DSP_BG_RED, cr >> 6);
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FIELD_MODIFY(RK3568_VP_DSP_BG__DSP_BG_GREEN, &val, y >> 6);
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FIELD_MODIFY(RK3568_VP_DSP_BG__DSP_BG_BLUE, &val, cb >> 6);
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} else {
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/*
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* Since performance is more important than accuracy here, make
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* use of the DRM_ARGB64_GET*_BPCS() helpers.
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*/
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val = FIELD_PREP(RK3568_VP_DSP_BG__DSP_BG_RED,
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DRM_ARGB64_GETR_BPCS(bgcolor, 10));
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FIELD_MODIFY(RK3568_VP_DSP_BG__DSP_BG_GREEN, &val,
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DRM_ARGB64_GETG_BPCS(bgcolor, 10));
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FIELD_MODIFY(RK3568_VP_DSP_BG__DSP_BG_BLUE, &val,
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DRM_ARGB64_GETB_BPCS(bgcolor, 10));
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}
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vop2_vp_write(vp, RK3568_VP_DSP_BG, val);
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}
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static void vop2_post_config(struct drm_crtc *crtc, bool force,
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struct drm_crtc_state *new_crtc_state,
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struct drm_crtc_state *old_crtc_state)
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{
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struct vop2_video_port *vp = to_vop2_video_port(crtc);
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struct vop2 *vop2 = vp->vop2;
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struct drm_display_mode *mode = &crtc->state->adjusted_mode;
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u64 bgcolor = crtc->state->background_color;
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struct drm_display_mode *mode = &new_crtc_state->adjusted_mode;
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u16 vtotal = mode->crtc_vtotal;
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u16 hdisplay = mode->crtc_hdisplay;
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u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start;
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@ -1605,15 +1734,7 @@ static void vop2_post_config(struct drm_crtc *crtc)
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vop2_vp_write(vp, RK3568_VP_POST_DSP_VACT_INFO_F1, val);
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}
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/*
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* Background color is programmed with 10 bits of precision.
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* Since performance is more important than accuracy here,
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* make use of the DRM_ARGB64_GET*_BPCS() helpers.
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*/
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val = FIELD_PREP(RK3568_VP_DSP_BG__DSP_BG_RED, DRM_ARGB64_GETR_BPCS(bgcolor, 10));
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FIELD_MODIFY(RK3568_VP_DSP_BG__DSP_BG_GREEN, &val, DRM_ARGB64_GETG_BPCS(bgcolor, 10));
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FIELD_MODIFY(RK3568_VP_DSP_BG__DSP_BG_BLUE, &val, DRM_ARGB64_GETB_BPCS(bgcolor, 10));
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vop2_vp_write(vp, RK3568_VP_DSP_BG, val);
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vop2_bgcolor_setup(crtc, force, new_crtc_state, old_crtc_state);
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}
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static int us_to_vertical_line(struct drm_display_mode *mode, int us)
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@ -1628,8 +1749,9 @@ static void vop2_crtc_atomic_enable(struct drm_crtc *crtc,
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struct vop2 *vop2 = vp->vop2;
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const struct vop2_data *vop2_data = vop2->data;
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const struct vop2_video_port_data *vp_data = &vop2_data->vp[vp->id];
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struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
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struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
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struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(crtc->state);
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struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(crtc_state);
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struct drm_display_mode *mode = &crtc->state->adjusted_mode;
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unsigned long clock = mode->crtc_clock * 1000;
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u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
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@ -1799,7 +1921,7 @@ static void vop2_crtc_atomic_enable(struct drm_crtc *crtc,
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clk_set_rate(vp->dclk, clock);
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vop2_post_config(crtc);
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vop2_post_config(crtc, true, crtc_state, old_crtc_state);
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vop2_cfg_done(vp);
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@ -1874,6 +1996,7 @@ static void vop2_crtc_atomic_flush(struct drm_crtc *crtc,
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struct drm_atomic_commit *state)
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{
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struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
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struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
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struct vop2_video_port *vp = to_vop2_video_port(crtc);
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struct vop2 *vop2 = vp->vop2;
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@ -1881,7 +2004,7 @@ static void vop2_crtc_atomic_flush(struct drm_crtc *crtc,
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if (!drm_atomic_crtc_needs_modeset(crtc_state) && crtc_state->color_mgmt_changed)
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vop2_crtc_atomic_try_set_gamma_locked(vop2, vp, crtc, crtc_state);
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vop2_post_config(crtc);
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vop2_post_config(crtc, false, crtc_state, old_crtc_state);
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vop2_cfg_done(vp);
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