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wifi: rtw89: coex: update coex software control for RTL8922D

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Update software control API due to 8922D PTA hardware changes.

Signed-off-by: Chia-Yuan Li <leo.li@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260108120320.2217402-4-pkshih@realtek.com
This commit is contained in:
Chia-Yuan Li 2026-01-08 20:03:10 +08:00 committed by Ping-Ke Shih
parent ed2feda12f
commit 286bb07889
3 changed files with 129 additions and 1 deletions
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2
drivers/net/wireless/realtek/rtw89/mac.h
View File

@ -1358,6 +1358,8 @@ int rtw89_mac_cfg_gnt_v1(struct rtw89_dev *rtwdev,
const struct rtw89_mac_ax_coex_gnt *gnt_cfg);
int rtw89_mac_cfg_gnt_v2(struct rtw89_dev *rtwdev,
const struct rtw89_mac_ax_coex_gnt *gnt_cfg);
int rtw89_mac_cfg_gnt_v3(struct rtw89_dev *rtwdev,
const struct rtw89_mac_ax_coex_gnt *gnt_cfg);
static inline
int rtw89_mac_cfg_plt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_plt *plt)

59
drivers/net/wireless/realtek/rtw89/mac_be.c
View File

@ -2003,12 +2003,65 @@ int rtw89_mac_cfg_gnt_v2(struct rtw89_dev *rtwdev,
}
EXPORT_SYMBOL(rtw89_mac_cfg_gnt_v2);
int rtw89_mac_cfg_gnt_v3(struct rtw89_dev *rtwdev,
const struct rtw89_mac_ax_coex_gnt *gnt_cfg)
{
u32 val = 0;
if (gnt_cfg->band[0].gnt_bt)
val |= B_BE_PTA_GNT_BT0_BB_VAL | B_BE_PTA_GNT_BT0_RX_BB0_VAL |
B_BE_PTA_GNT_BT0_TX_BB0_VAL;
if (gnt_cfg->band[0].gnt_bt_sw_en)
val |= B_BE_PTA_GNT_BT0_BB_SWCTRL | B_BE_PTA_GNT_BT0_RX_BB0_SWCTRL |
B_BE_PTA_GNT_BT0_TX_BB0_SWCTRL;
if (gnt_cfg->band[0].gnt_wl)
val |= B_BE_PTA_GNT_WL_BB0_VAL;
if (gnt_cfg->band[0].gnt_wl_sw_en)
val |= B_BE_PTA_GNT_WL_BB0_SWCTRL;
if (gnt_cfg->band[1].gnt_bt)
val |= B_BE_PTA_GNT_BT0_BB_VAL | B_BE_PTA_GNT_BT0_RX_BB1_VAL |
B_BE_PTA_GNT_BT0_TX_BB1_VAL;
if (gnt_cfg->band[1].gnt_bt_sw_en)
val |= B_BE_PTA_GNT_BT0_BB_SWCTRL | B_BE_PTA_GNT_BT0_RX_BB1_SWCTRL |
B_BE_PTA_GNT_BT0_TX_BB1_SWCTRL;
if (gnt_cfg->band[1].gnt_wl)
val |= B_BE_PTA_GNT_WL_BB1_VAL;
if (gnt_cfg->band[1].gnt_wl_sw_en)
val |= B_BE_PTA_GNT_WL_BB1_SWCTRL;
if (gnt_cfg->bt[0].wlan_act_en)
val |= B_BE_PTA_WL_ACT0_SWCTRL | B_BE_PTA_WL_ACT_RX_BT0_SWCTRL |
B_BE_PTA_WL_ACT_TX_BT0_SWCTRL;
if (gnt_cfg->bt[0].wlan_act)
val |= B_BE_PTA_WL_ACT0_VAL | B_BE_PTA_WL_ACT_RX_BT0_VAL |
B_BE_PTA_WL_ACT_TX_BT0_VAL;
if (gnt_cfg->bt[1].wlan_act_en)
val |= B_BE_PTA_WL_ACT1_SWCTRL | B_BE_PTA_WL_ACT_RX_BT1_SWCTRL |
B_BE_PTA_WL_ACT_TX_BT1_SWCTRL;
if (gnt_cfg->bt[1].wlan_act)
val |= B_BE_PTA_WL_ACT1_VAL | B_BE_PTA_WL_ACT_RX_BT1_VAL |
B_BE_PTA_WL_ACT_TX_BT1_VAL;
rtw89_write32(rtwdev, R_BE_PTA_GNT_SW_CTRL, val);
return 0;
}
EXPORT_SYMBOL(rtw89_mac_cfg_gnt_v3);
int rtw89_mac_cfg_ctrl_path_v2(struct rtw89_dev *rtwdev, bool wl)
{
struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_dm *dm = &btc->dm;
struct rtw89_mac_ax_gnt *g = dm->gnt.band;
struct rtw89_mac_ax_wl_act *gbt = dm->gnt.bt;
const struct rtw89_chip_info *chip = rtwdev->chip;
int i;
if (wl)
@ -2023,7 +2076,11 @@ int rtw89_mac_cfg_ctrl_path_v2(struct rtw89_dev *rtwdev, bool wl)
gbt[i].wlan_act_en = 0;
}
return rtw89_mac_cfg_gnt_v2(rtwdev, &dm->gnt);
if (chip->chip_id == RTL8922A)
return rtw89_mac_cfg_gnt_v2(rtwdev, &dm->gnt);
else
return rtw89_mac_cfg_gnt_v3(rtwdev, &dm->gnt);
}
EXPORT_SYMBOL(rtw89_mac_cfg_ctrl_path_v2);

69
drivers/net/wireless/realtek/rtw89/reg.h
View File

@ -6202,6 +6202,75 @@
#define B_BE_GNT_WL_BB_PWR_VAL BIT(1)
#define B_BE_GNT_WL_BB_PWR_SWCTRL BIT(0)
#define R_BE_PTA_GNT_SW_CTRL 0x0E348
#define B_BE_PTA_WL_ACT0_VAL BIT(19)
#define B_BE_PTA_WL_ACT0_SWCTRL BIT(18)
#define B_BE_PTA_GNT_BT0_RX_BB1_VAL BIT(17)
#define B_BE_PTA_GNT_BT0_RX_BB1_SWCTRL BIT(16)
#define B_BE_PTA_GNT_BT0_TX_BB1_VAL BIT(15)
#define B_BE_PTA_GNT_BT0_TX_BB1_SWCTRL BIT(14)
#define B_BE_PTA_GNT_BT0_RX_BB0_VAL BIT(13)
#define B_BE_PTA_GNT_BT0_RX_BB0_SWCTRL BIT(12)
#define B_BE_PTA_GNT_BT0_TX_BB0_VAL BIT(11)
#define B_BE_PTA_GNT_BT0_TX_BB0_SWCTRL BIT(10)
#define B_BE_PTA_GNT_BT0_BB_VAL BIT(9)
#define B_BE_PTA_GNT_BT0_BB_SWCTRL BIT(8)
#define B_BE_PTA_WL_ACT_RX_BT0_VAL BIT(7)
#define B_BE_PTA_WL_ACT_RX_BT0_SWCTRL BIT(6)
#define B_BE_PTA_WL_ACT_TX_BT0_VAL BIT(5)
#define B_BE_PTA_WL_ACT_TX_BT0_SWCTRL BIT(4)
#define B_BE_PTA_GNT_WL_BB1_VAL BIT(3)
#define B_BE_PTA_GNT_WL_BB1_SWCTRL BIT(2)
#define B_BE_PTA_GNT_WL_BB0_VAL BIT(1)
#define B_BE_PTA_GNT_WL_BB0_SWCTRL BIT(0)
#define R_BE_PTA_GNT_VAL 0x0E34C
#define B_BE_PTA_WL_ACT2 BIT(20)
#define B_BE_PTA_GNT_ZB_TX_BB1 BIT(19)
#define B_BE_PTA_GNT_ZB_TX_BB0 BIT(18)
#define B_BE_PTA_WL_ACT1 BIT(17)
#define B_BE_PTA_GNT_BT1_RX_BB1 BIT(16)
#define B_BE_PTA_GNT_BT1_RX_BB0 BIT(15)
#define B_BE_PTA_GNT_BT1_TX_BB1 BIT(14)
#define B_BE_PTA_GNT_BT1_TX_BB0 BIT(13)
#define B_BE_PTA_WL_ACT_RX_BT1 BIT(12)
#define B_BE_PTA_WL_ACT_TX_BT1 BIT(11)
#define B_BE_PTA_GNT_BT1_BB BIT(10)
#define B_BE_PTA_WL_ACT0 BIT(9)
#define B_BE_PTA_GNT_BT0_RX_BB1 BIT(8)
#define B_BE_PTA_GNT_BT0_TX_BB1 BIT(7)
#define B_BE_PTA_GNT_BT0_RX_BB0 BIT(6)
#define B_BE_PTA_GNT_BT0_TX_BB0 BIT(5)
#define B_BE_PTA_GNT_BT0_BB BIT(4)
#define B_BE_PTA_WL_ACT_RX_BT0 BIT(3)
#define B_BE_PTA_WL_ACT_TX_BT0 BIT(2)
#define B_BE_PTA_GNT_WL_BB1 BIT(1)
#define B_BE_PTA_GNT_WL_BB0 BIT(0)
#define R_BE_PTA_GNT_ZL_SW_CTRL 0x0E350
#define B_BE_PTA_WL_ACT2_VAL BIT(21)
#define B_BE_PTA_WL_ACT2_SWCTRL BIT(20)
#define B_BE_PTA_GNT_ZB_TX_BB1_VAL BIT(19)
#define B_BE_PTA_GNT_ZB_TX_BB1_SWCTRL BIT(18)
#define B_BE_PTA_GNT_ZB_TX_BB0_VAL BIT(17)
#define B_BE_PTA_GNT_ZB_TX_BB0_SWCTRL BIT(16)
#define B_BE_PTA_WL_ACT1_VAL BIT(15)
#define B_BE_PTA_WL_ACT1_SWCTRL BIT(14)
#define B_BE_PTA_GNT_BT1_RX_BB1_VAL BIT(13)
#define B_BE_PTA_GNT_BT1_RX_BB1_SWCTRL BIT(12)
#define B_BE_PTA_GNT_BT1_RX_BB0_VAL BIT(11)
#define B_BE_PTA_GNT_BT1_RX_BB0_SWCTRL BIT(10)
#define B_BE_PTA_GNT_BT1_TX_BB1_VAL BIT(9)
#define B_BE_PTA_GNT_BT1_TX_BB1_SWCTRL BIT(8)
#define B_BE_PTA_GNT_BT1_TX_BB0_VAL BIT(7)
#define B_BE_PTA_GNT_BT1_TX_BB0_SWCTRL BIT(6)
#define B_BE_PTA_WL_ACT_RX_BT1_VAL BIT(5)
#define B_BE_PTA_WL_ACT_RX_BT1_SWCTRL BIT(4)
#define B_BE_PTA_WL_ACT_TX_BT1_VAL BIT(3)
#define B_BE_PTA_WL_ACT_TX_BT1_SWCTRL BIT(2)
#define B_BE_PTA_GNT_BT1_BB_VAL BIT(1)
#define B_BE_PTA_GNT_BT1_BB_SWCTRL BIT(0)
#define R_BE_PWR_MACID_PATH_BASE 0x0E500
#define R_BE_PWR_MACID_LMT_BASE 0x0ED00