From 2863b8f38f5e344334d960c7341b4acd1a61197b Mon Sep 17 00:00:00 2001
From: Suneel Garapati <suneelg@nvidia.com>
Date: Wed, 8 Apr 2026 21:24:13 +0000
Subject: [PATCH] arm64: tegra: Add GTE nodes for Tegra264

Add AON GPIO and system LIC GTE instances for Tegra264.

Signed-off-by: Suneel Garapati <suneelg@nvidia.com>
Acked-by: Dipen Patel <dipenp@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra264.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
index 0ad3ab802f0b..af748df3e2b9 100644
--- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
@@ -50,6 +50,15 @@ timer@8000000 {
 			status = "disabled";
 		};
 
+		hte_lic: hardware-timestamp@8380000 {
+			compatible = "nvidia,tegra264-gte-lic";
+			reg = <0x0 0x08380000 0x0 0x10000>;
+			interrupts = <GIC_SPI 0x00000268 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,int-threshold = <1>;
+			#timestamp-cells = <1>;
+			status = "disabled";
+		};
+
 		aconnect@9000000 {
 			compatible = "nvidia,tegra264-aconnect",
 					"nvidia,tegra210-aconnect";
@@ -3268,6 +3277,16 @@ hsp_top: hsp@8800000 {
 			#mbox-cells = <2>;
 		};
 
+		hte_aon: hardware-timestamp@c2b0000 {
+			compatible = "nvidia,tegra264-gte-aon";
+			reg = <0x0 0x0c2b0000 0x0 0x10000>;
+			interrupts = <GIC_SPI 0x00000226 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,int-threshold = <1>;
+			#timestamp-cells = <1>;
+			nvidia,gpio-controller = <&gpio_aon>;
+			status = "disabled";
+		};
+
 		rtc: rtc@c2c0000 {
 			compatible = "nvidia,tegra264-rtc", "nvidia,tegra20-rtc";
 			reg = <0x0 0x0c2c0000 0x0 0x10000>;