diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts index 042c486bdda2..e035e4456867 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include "fsl-lx2160a.dtsi" +#include "fsl-lx2160a-rev1.dtsi" / { model = "NXP Layerscape LX2160ABLUEBOX3"; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts index 802d7611c647..4e47bb389af6 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include "fsl-lx2160a.dtsi" +#include "fsl-lx2160a-rev1.dtsi" #include "fsl-lx2160a-cex7.dtsi" #include "fsl-lx2160a-clearfog-itx.dtsi" diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dts index 2b1e13053422..1a603decd034 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include "fsl-lx2160a.dtsi" +#include "fsl-lx2160a-rev1.dtsi" #include "fsl-lx2160a-cex7.dtsi" #include "fsl-lx2160a-clearfog-itx.dtsi" diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev1.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev1.dtsi new file mode 100644 index 000000000000..7538dbdc8093 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev1.dtsi @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// +// Device Tree Include file for Layerscape-LX2160A Rev1 SoC. +// +// Copyright 2026 NXP + +#include "fsl-lx216x.dtsi" +#include "fsl-lx2160a-pcie-mbvl.dtsi" +#include "fsl-lx2160a-serdes.dtsi" diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi index c2a18cfd8efc..47a42347c230 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi @@ -6,5 +6,6 @@ /dts-v1/; -#include "fsl-lx2160a.dtsi" +#include "fsl-lx216x.dtsi" #include "fsl-lx216xa-pcie-gen3.dtsi" +#include "fsl-lx2160a-serdes.dtsi" diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi index 89a4765737b4..cc6b6427ec8a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi @@ -5,7 +5,7 @@ * Author: Gregor Herburger */ -#include "fsl-lx2160a.dtsi" +#include "fsl-lx2160a-rev1.dtsi" / { reg_vcc3v3: regulator-vcc3v3 { diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts index df2568ec7f1a..63f161610caa 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts @@ -8,7 +8,7 @@ #include -#include "fsl-lx2160a-rev2.dtsi" +#include "fsl-lx2162a.dtsi" #include "fsl-lx2162a-sr-som.dtsi" / { diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts index 7a595fddc027..0ba56b9819ac 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include "fsl-lx2160a-rev2.dtsi" +#include "fsl-lx2162a.dtsi" / { model = "NXP Layerscape LX2162AQDS"; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-serdes.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2162a-serdes.dtsi new file mode 100644 index 000000000000..23f05a138eac --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-serdes.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// +// Device Tree file describing the Lynx 28G SerDes blocks found on the LX2162A +// SoC +// +// Copyright 2026 NXP + +&soc { + serdes_1: phy@1ea0000 { + compatible = "fsl,lynx-28g"; + reg = <0x0 0x1ea0000 0x0 0x1e30>; + #phy-cells = <1>; + }; + + serdes_2: phy@1eb0000 { + compatible = "fsl,lynx-28g"; + reg = <0x0 0x1eb0000 0x0 0x1e30>; + #phy-cells = <1>; + status = "disabled"; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2162a.dtsi new file mode 100644 index 000000000000..b710f6a8eb48 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a.dtsi @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// +// Device Tree file for LX2162 SoC +// +// Copyright 2026 NXP + +#include "fsl-lx216x.dtsi" +#include "fsl-lx216xa-pcie-gen3.dtsi" +#include "fsl-lx2162a-serdes.dtsi" diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi similarity index 99% rename from arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi rename to arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi index da139e7fa30c..ae6e37870c5e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi @@ -1840,6 +1840,3 @@ optee: optee { }; }; }; - -#include "fsl-lx2160a-pcie-mbvl.dtsi" -#include "fsl-lx2160a-serdes.dtsi" diff --git a/arch/arm64/boot/dts/freescale/fsl-lx216xa-pcie-gen3.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx216xa-pcie-gen3.dtsi index f405b21e68fc..068fbf9bf04f 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx216xa-pcie-gen3.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx216xa-pcie-gen3.dtsi @@ -4,127 +4,39 @@ // // Copyright 2026 NXP -&pcie1 { - compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; - reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ - 0x80 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "regs", "config"; - - ranges = /* 16-Bit IO Window */ - <0x81000000 0x00 0x00000000 0x80 0x00010000 0x00 0x00010000>, - /* 32-Bit - non-prefetchable */ - <0x82000000 0x00 0x40000000 0x80 0x40000000 0x00 0x40000000>, - /* 64-Bit - prefetchable - 16GB */ - <0xC3000000 0x84 0x00000000 0x84 0x00000000 0x04 0x00000000>; - - interrupts = ; - interrupt-names = "intr"; - - /delete-property/ apio-wins; - /delete-property/ ppio-wins; -}; - -&pcie2 { - compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; - reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ - 0x88 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "regs", "config"; - - ranges = /* 16-Bit IO Window */ - <0x81000000 0x00 0x00000000 0x88 0x00010000 0x00 0x00010000>, - /* 32-Bit - non-prefetchable */ - <0x82000000 0x00 0x40000000 0x88 0x40000000 0x00 0x40000000>, - /* 64-Bit - prefetchable - 16GB */ - <0xC3000000 0x8c 0x00000000 0x8c 0x00000000 0x04 0x00000000>; - - interrupts = ; - interrupt-names = "intr"; - - /delete-property/ apio-wins; - /delete-property/ ppio-wins; -}; - -&pcie3 { - compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; - reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ - 0x90 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "regs", "config"; - - ranges = /* 16-Bit IO Window */ - <0x81000000 0x00 0x00000000 0x90 0x00010000 0x00 0x00010000>, - /* 32-Bit - non-prefetchable */ - <0x82000000 0x00 0x40000000 0x90 0x40000000 0x00 0x40000000>, - /* 64-Bit - prefetchable - 16GB */ - <0xC3000000 0x94 0x00000000 0x94 0x00000000 0x04 0x00000000>; - - interrupts = ; - interrupt-names = "intr"; - - /delete-property/ apio-wins; - /delete-property/ ppio-wins; -}; - -&pcie4 { - compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; - reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */ - 0x98 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "regs", "config"; - - ranges = /* 16-Bit IO Window */ - <0x81000000 0x00 0x00000000 0x98 0x00010000 0x00 0x00010000>, - /* 32-Bit - non-prefetchable */ - <0x82000000 0x00 0x40000000 0x98 0x40000000 0x00 0x40000000>, - /* 64-Bit - prefetchable - 16GB */ - <0xC3000000 0x9c 0x00000000 0x9c 0x00000000 0x04 0x00000000>; - - interrupts = ; - interrupt-names = "intr"; - - /delete-property/ apio-wins; - /delete-property/ ppio-wins; -}; - -&pcie5 { - compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; - reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */ - 0xa0 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "regs", "config"; - - ranges = /* 16-Bit IO Window */ - <0x81000000 0x00 0x00000000 0xa0 0x00010000 0x00 0x00010000>, - /* 32-Bit - non-prefetchable */ - <0x82000000 0x00 0x40000000 0xa0 0x40000000 0x00 0x40000000>, - /* 64-Bit - prefetchable - 16GB */ - <0xC3000000 0xa4 0x00000000 0xa4 0x00000000 0x04 0x00000000>; - - interrupts = ; - interrupt-names = "intr"; - - /delete-property/ apio-wins; - /delete-property/ ppio-wins; -}; - -&pcie6 { - compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; - reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */ - 0xa8 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "regs", "config"; - - ranges = /* 16-Bit IO Window */ - <0x81000000 0x00 0x00000000 0xa8 0x00010000 0x00 0x00010000>, - /* 32-Bit - non-prefetchable */ - <0x82000000 0x00 0x40000000 0xa8 0x40000000 0x00 0x40000000>, - /* 64-Bit - prefetchable - 16GB */ - <0xC3000000 0xac 0x00000000 0xac 0x00000000 0x04 0x00000000>; - - interrupts = ; - interrupt-names = "intr"; - - /delete-property/ apio-wins; - /delete-property/ ppio-wins; -}; - &soc { + pcie1: pcie@3400000 { + compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ + 0x80 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + bus-range = <0x0 0xff>; + + ranges = /* 16-Bit IO Window */ + <0x81000000 0x00 0x00000000 0x80 0x00010000 0x00 0x00010000>, + /* 32-Bit - non-prefetchable */ + <0x82000000 0x00 0x40000000 0x80 0x40000000 0x00 0x40000000>, + /* 64-Bit - prefetchable - 16GB */ + <0xC3000000 0x84 0x00000000 0x84 0x00000000 0x04 0x00000000>; + + interrupts = ; + interrupt-names = "intr"; + msi-parent = <&its 0>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ + status = "disabled"; + }; + pcie_ep1: pcie-ep@3400000 { compatible = "fsl,lx2160ar2-pcie-ep"; reg = <0x00 0x03400000 0x0 0x00100000 @@ -135,6 +47,37 @@ pcie_ep1: pcie-ep@3400000 { status = "disabled"; }; + pcie2: pcie@3500000 { + compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ + 0x88 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + bus-range = <0x0 0xff>; + ranges = /* 16-Bit IO Window */ + <0x81000000 0x00 0x00000000 0x88 0x00010000 0x00 0x00010000>, + /* 32-Bit - non-prefetchable */ + <0x82000000 0x00 0x40000000 0x88 0x40000000 0x00 0x40000000>, + /* 64-Bit - prefetchable - 16GB */ + <0xC3000000 0x8c 0x00000000 0x8c 0x00000000 0x04 0x00000000>; + + interrupts = ; + interrupt-names = "intr"; + msi-parent = <&its 0>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ + status = "disabled"; + }; + pcie_ep2: pcie-ep@3500000 { compatible = "fsl,lx2160ar2-pcie-ep"; reg = <0x00 0x03500000 0x0 0x00100000 @@ -145,6 +88,38 @@ pcie_ep2: pcie-ep@3500000 { status = "disabled"; }; + pcie3: pcie@3600000 { + compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ + 0x90 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + bus-range = <0x0 0xff>; + ranges = /* 16-Bit IO Window */ + <0x81000000 0x00 0x00000000 0x90 0x00010000 0x00 0x00010000>, + /* 32-Bit - non-prefetchable */ + <0x82000000 0x00 0x40000000 0x90 0x40000000 0x00 0x40000000>, + /* 64-Bit - prefetchable - 16GB */ + <0xC3000000 0x94 0x00000000 0x94 0x00000000 0x04 0x00000000>; + + interrupts = ; + interrupt-names = "intr"; + + msi-parent = <&its 0>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ + status = "disabled"; + }; + pcie_ep3: pcie-ep@3600000 { compatible = "fsl,lx2160ar2-pcie-ep"; reg = <0x00 0x03600000 0x0 0x00100000 @@ -155,6 +130,37 @@ pcie_ep3: pcie-ep@3600000 { status = "disabled"; }; + pcie4: pcie@3700000 { + compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; + reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */ + 0x98 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + bus-range = <0x0 0xff>; + ranges = /* 16-Bit IO Window */ + <0x81000000 0x00 0x00000000 0x98 0x00010000 0x00 0x00010000>, + /* 32-Bit - non-prefetchable */ + <0x82000000 0x00 0x40000000 0x98 0x40000000 0x00 0x40000000>, + /* 64-Bit - prefetchable - 16GB */ + <0xC3000000 0x9c 0x00000000 0x9c 0x00000000 0x04 0x00000000>; + + interrupts = ; + interrupt-names = "intr"; + msi-parent = <&its 0>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; + iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ + status = "disabled"; + }; + pcie_ep4: pcie-ep@3700000 { compatible = "fsl,lx2160ar2-pcie-ep"; reg = <0x00 0x03700000 0x0 0x00100000 @@ -165,6 +171,38 @@ pcie_ep4: pcie-ep@3700000 { status = "disabled"; }; + pcie5: pcie@3800000 { + compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; + reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */ + 0xa0 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + bus-range = <0x0 0xff>; + + ranges = /* 16-Bit IO Window */ + <0x81000000 0x00 0x00000000 0xa0 0x00010000 0x00 0x00010000>, + /* 32-Bit - non-prefetchable */ + <0x82000000 0x00 0x40000000 0xa0 0x40000000 0x00 0x40000000>, + /* 64-Bit - prefetchable - 16GB */ + <0xC3000000 0xa4 0x00000000 0xa4 0x00000000 0x04 0x00000000>; + + interrupts = ; + interrupt-names = "intr"; + msi-parent = <&its 0>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; + iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ + status = "disabled"; + }; + pcie_ep5: pcie-ep@3800000 { compatible = "fsl,lx2160ar2-pcie-ep"; reg = <0x00 0x03800000 0x0 0x00100000 @@ -175,6 +213,38 @@ pcie_ep5: pcie-ep@3800000 { status = "disabled"; }; + pcie6: pcie@3900000 { + compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; + reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */ + 0xa8 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + bus-range = <0x0 0xff>; + + ranges = /* 16-Bit IO Window */ + <0x81000000 0x00 0x00000000 0xa8 0x00010000 0x00 0x00010000>, + /* 32-Bit - non-prefetchable */ + <0x82000000 0x00 0x40000000 0xa8 0x40000000 0x00 0x40000000>, + /* 64-Bit - prefetchable - 16GB */ + <0xC3000000 0xac 0x00000000 0xac 0x00000000 0x04 0x00000000>; + + interrupts = ; + interrupt-names = "intr"; + msi-parent = <&its 0>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ + status = "disabled"; + }; + pcie_ep6: pcie-ep@3900000 { compatible = "fsl,lx2160ar2-pcie-ep"; reg = <0x00 0x03900000 0x0 0x00100000