arm64: dts: qcom: Correct white-space style

There should be exactly one space before and after '=', and one space
before '{'.  No functional impact.  Verified with comparing decompiled
DTB (dtx_diff and fdtdump+diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250219090751.124267-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Krzysztof Kozlowski 2025-02-19 10:07:51 +01:00 committed by Bjorn Andersson
parent 91e3ac1552
commit 27fd3266e8
5 changed files with 31 additions and 31 deletions

View File

@ -876,11 +876,11 @@ frame@b128000 {
pcie1: pcie@10000000 {
compatible = "qcom,pcie-ipq9574";
reg = <0x10000000 0xf1d>,
<0x10000f20 0xa8>,
<0x10001000 0x1000>,
<0x000f8000 0x4000>,
<0x10100000 0x1000>;
reg = <0x10000000 0xf1d>,
<0x10000f20 0xa8>,
<0x10001000 0x1000>,
<0x000f8000 0x4000>,
<0x10100000 0x1000>;
reg-names = "dbi", "elbi", "atu", "parf", "config";
device_type = "pci";
linux,pci-domain = <1>;
@ -956,11 +956,11 @@ pcie1: pcie@10000000 {
pcie3: pcie@18000000 {
compatible = "qcom,pcie-ipq9574";
reg = <0x18000000 0xf1d>,
<0x18000f20 0xa8>,
<0x18001000 0x1000>,
<0x000f0000 0x4000>,
<0x18100000 0x1000>;
reg = <0x18000000 0xf1d>,
<0x18000f20 0xa8>,
<0x18001000 0x1000>,
<0x000f0000 0x4000>,
<0x18100000 0x1000>;
reg-names = "dbi", "elbi", "atu", "parf", "config";
device_type = "pci";
linux,pci-domain = <3>;
@ -1036,11 +1036,11 @@ pcie3: pcie@18000000 {
pcie2: pcie@20000000 {
compatible = "qcom,pcie-ipq9574";
reg = <0x20000000 0xf1d>,
<0x20000f20 0xa8>,
<0x20001000 0x1000>,
<0x00088000 0x4000>,
<0x20100000 0x1000>;
reg = <0x20000000 0xf1d>,
<0x20000f20 0xa8>,
<0x20001000 0x1000>,
<0x00088000 0x4000>,
<0x20100000 0x1000>;
reg-names = "dbi", "elbi", "atu", "parf", "config";
device_type = "pci";
linux,pci-domain = <2>;
@ -1116,11 +1116,11 @@ pcie2: pcie@20000000 {
pcie0: pci@28000000 {
compatible = "qcom,pcie-ipq9574";
reg = <0x28000000 0xf1d>,
<0x28000f20 0xa8>,
<0x28001000 0x1000>,
<0x00080000 0x4000>,
<0x28100000 0x1000>;
reg = <0x28000000 0xf1d>,
<0x28000f20 0xa8>,
<0x28001000 0x1000>,
<0x00080000 0x4000>,
<0x28100000 0x1000>;
reg-names = "dbi", "elbi", "atu", "parf", "config";
device_type = "pci";
linux,pci-domain = <0>;

View File

@ -119,7 +119,7 @@ bq27426@55 {
monitored-battery = <&battery>;
};
bq25601@6b{
bq25601@6b {
compatible = "ti,bq25601";
reg = <0x6b>;
interrupts-extended = <&tlmm 61 IRQ_TYPE_EDGE_FALLING>;

View File

@ -587,7 +587,7 @@ tsens_s4_p2: s4-p2@217 {
bits = <1 6>;
};
tsens_s9_p1: s9-p1@230{
tsens_s9_p1: s9-p1@230 {
reg = <0x230 1>;
bits = <0 6>;
};

View File

@ -1825,7 +1825,7 @@ replicator@6046000 {
in-ports {
port {
replicator0_in: endpoint {
remote-endpoint= <&tmc_etf_out>;
remote-endpoint = <&tmc_etf_out>;
};
};
};
@ -1838,7 +1838,7 @@ port@1 {
reg = <1>;
replicator0_out1: endpoint {
remote-endpoint= <&replicator1_in>;
remote-endpoint = <&replicator1_in>;
};
};
};
@ -1878,7 +1878,7 @@ replicator@604a000 {
in-ports {
port {
replicator1_in: endpoint {
remote-endpoint= <&replicator0_out1>;
remote-endpoint = <&replicator0_out1>;
};
};
};
@ -1886,7 +1886,7 @@ replicator1_in: endpoint {
out-ports {
port {
replicator1_out: endpoint {
remote-endpoint= <&funnel_swao_in6>;
remote-endpoint = <&funnel_swao_in6>;
};
};
};
@ -2317,7 +2317,7 @@ port@6 {
reg = <6>;
funnel_swao_in6: endpoint {
remote-endpoint= <&replicator1_out>;
remote-endpoint = <&replicator1_out>;
};
};
@ -2325,7 +2325,7 @@ port@7 {
reg = <7>;
funnel_swao_in7: endpoint {
remote-endpoint= <&tpda_swao_out>;
remote-endpoint = <&tpda_swao_out>;
};
};
};
@ -2349,7 +2349,7 @@ tmc@6b09000 {
in-ports {
port {
tmc_etf_swao_in: endpoint {
remote-endpoint= <&funnel_swao_out>;
remote-endpoint = <&funnel_swao_out>;
};
};
};
@ -2357,7 +2357,7 @@ tmc_etf_swao_in: endpoint {
out-ports {
port {
tmc_etf_swao_out: endpoint {
remote-endpoint= <&replicator_swao_in>;
remote-endpoint = <&replicator_swao_in>;
};
};
};

View File

@ -990,7 +990,7 @@ uart14: serial@898000 {
clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
clock-names = "se";
interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
&clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
&config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>;