From 27cf0ad162f1a4526a86fc2ec24d84a4a98ac1dd Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Mon, 13 Jul 2026 16:05:33 +0300 Subject: [PATCH] i3c: renesas: Reset the controller on resume Reset the controller on resume after enabling the clocks to follow the same sequence as in probe and avoid potential ordering related failures. With it, renesas_i3c_reset() was updated to use read_poll_timeout_atomic(), as the driver's resume callback is executed during the noirq phase of resume, where interrupts are disabled. Fixes: e7218986319b ("i3c: renesas: Add suspend/resume support") Cc: stable@vger.kernel.org Reviewed-by: Frank Li Signed-off-by: Claudiu Beznea Tested-by: Tommaso Merciai Link: https://patch.msgid.link/20260713130545.568657-6-claudiu.beznea+renesas@tuxon.dev Signed-off-by: Alexandre Belloni --- drivers/i3c/master/renesas-i3c.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-i3c.c index ba500714fe06..fa8045b49fca 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -495,8 +495,8 @@ static int renesas_i3c_reset(struct renesas_i3c *i3c) renesas_writel(i3c->regs, BCTL, 0); renesas_set_bit(i3c->regs, RSTCTL, RSTCTL_RI3CRST); - return read_poll_timeout(renesas_readl, val, !(val & RSTCTL_RI3CRST), - 0, 1000, false, i3c->regs, RSTCTL); + return read_poll_timeout_atomic(renesas_readl, val, !(val & RSTCTL_RI3CRST), + 0, 1000, false, i3c->regs, RSTCTL); } static void renesas_i3c_hw_init(struct renesas_i3c *i3c) @@ -1491,6 +1491,10 @@ static int renesas_i3c_resume_noirq(struct device *dev) if (ret) goto err_presetn; + ret = renesas_i3c_reset(i3c); + if (ret) + goto err_clks_disable; + /* Re-store I3C registers value. */ renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); renesas_writel(i3c->regs, EXTBR, i3c->extbr); @@ -1510,6 +1514,8 @@ static int renesas_i3c_resume_noirq(struct device *dev) return 0; +err_clks_disable: + clk_bulk_disable(i3c->num_clks, i3c->clks); err_presetn: reset_control_assert(i3c->presetn); err_tresetn: