From 27a2dca1241cb4a485cec844185d20b42370ed76 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Tue, 21 Jul 2026 11:36:24 +0200 Subject: [PATCH] misc: qcom-coincell: Migrate to devm_spmi_subdevice_alloc_and_add() Some Qualcomm PMICs integrate a charger for coincells, usually powering an RTC when external (or main battery) power is missing. Instead of using the parent SPMI device (the main PMIC) as a kind of syscon in this driver, register a new SPMI sub-device and initialize its own regmap with this sub-device's specific base address, retrieved from the devicetree. This allows to stop manually adding the register base address to every R/W call in this driver, as this can be, and is now, handled by the regmap API instead. Acked-by: Greg Kroah-Hartman Tested-by: Neil Armstrong # on SM8650-QRD Reviewed-by: Andy Shevchenko Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd --- drivers/misc/Kconfig | 2 ++ drivers/misc/qcom-coincell.c | 45 +++++++++++++++++++++++++----------- 2 files changed, 34 insertions(+), 13 deletions(-) diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 7364931dad3a..e7d6b79dc6a0 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -256,6 +256,8 @@ config HP_ILO config QCOM_COINCELL tristate "Qualcomm coincell charger support" depends on MFD_SPMI_PMIC || COMPILE_TEST + depends on SPMI + select REGMAP_SPMI help This driver supports the coincell block found inside of Qualcomm PMICs. The coincell charger provides a means to diff --git a/drivers/misc/qcom-coincell.c b/drivers/misc/qcom-coincell.c index b58bd34fc471..8da3736652c3 100644 --- a/drivers/misc/qcom-coincell.c +++ b/drivers/misc/qcom-coincell.c @@ -9,11 +9,11 @@ #include #include #include +#include struct qcom_coincell { struct device *dev; struct regmap *regmap; - u32 base_addr; }; #define QCOM_COINCELL_REG_RSET 0x44 @@ -35,7 +35,7 @@ static int qcom_coincell_chgr_config(struct qcom_coincell *chgr, int rset, /* if disabling, just do that and skip other operations */ if (!enable) return regmap_write(chgr->regmap, - chgr->base_addr + QCOM_COINCELL_REG_ENABLE, 0); + QCOM_COINCELL_REG_ENABLE, 0); /* find index for current-limiting resistor */ for (i = 0; i < ARRAY_SIZE(qcom_rset_map); i++) @@ -58,7 +58,7 @@ static int qcom_coincell_chgr_config(struct qcom_coincell *chgr, int rset, } rc = regmap_write(chgr->regmap, - chgr->base_addr + QCOM_COINCELL_REG_RSET, i); + QCOM_COINCELL_REG_RSET, i); if (rc) { /* * This is mainly to flag a bad base_addr (reg) from dts. @@ -71,19 +71,28 @@ static int qcom_coincell_chgr_config(struct qcom_coincell *chgr, int rset, } rc = regmap_write(chgr->regmap, - chgr->base_addr + QCOM_COINCELL_REG_VSET, j); + QCOM_COINCELL_REG_VSET, j); if (rc) return rc; /* set 'enable' register */ return regmap_write(chgr->regmap, - chgr->base_addr + QCOM_COINCELL_REG_ENABLE, + QCOM_COINCELL_REG_ENABLE, QCOM_COINCELL_ENABLE); } static int qcom_coincell_probe(struct platform_device *pdev) { - struct device_node *node = pdev->dev.of_node; + struct regmap_config qcom_coincell_regmap_config = { + .reg_bits = 16, + .val_bits = 8, + .max_register = 0xff, + .fast_io = true, + }; + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node; + struct spmi_subdevice *sub_sdev; + struct spmi_device *sparent; struct qcom_coincell chgr; u32 rset = 0; u32 vset = 0; @@ -92,16 +101,25 @@ static int qcom_coincell_probe(struct platform_device *pdev) chgr.dev = &pdev->dev; - chgr.regmap = dev_get_regmap(pdev->dev.parent, NULL); - if (!chgr.regmap) { - dev_err(chgr.dev, "Unable to get regmap\n"); - return -EINVAL; - } - - rc = of_property_read_u32(node, "reg", &chgr.base_addr); + rc = device_property_read_u32(dev, "reg", &qcom_coincell_regmap_config.reg_base); if (rc) return rc; + sparent = spmi_get_parent_spmi_device(dev); + if (!sparent) + return -ENODEV; + + sub_sdev = devm_spmi_subdevice_alloc_and_add(dev, sparent); + if (IS_ERR(sub_sdev)) + return PTR_ERR(sub_sdev); + + chgr.regmap = devm_regmap_init_spmi_ext(&sub_sdev->sdev, + &qcom_coincell_regmap_config); + if (IS_ERR(chgr.regmap)) { + dev_err(chgr.dev, "Unable to get regmap\n"); + return PTR_ERR(chgr.regmap); + } + enable = !of_property_read_bool(node, "qcom,charger-disable"); if (enable) { @@ -142,3 +160,4 @@ module_platform_driver(qcom_coincell_driver); MODULE_DESCRIPTION("Qualcomm PMIC coincell charger driver"); MODULE_LICENSE("GPL v2"); +MODULE_IMPORT_NS("SPMI");