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arm64: dts: rockchip: Add spi nodes for RK3528
There are 2 SPI controllers on the RK3528 SoC, describe it. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Link: https://lore.kernel.org/r/20250520100102.1226725-3-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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79f2a17024
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2783335329
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@ -439,6 +439,34 @@ ioc_grf: syscon@ff540000 {
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reg = <0x0 0xff540000 0x0 0x40000>;
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};
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spi0: spi@ff9c0000 {
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compatible = "rockchip,rk3528-spi",
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"rockchip,rk3066-spi";
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reg = <0x0 0xff9c0000 0x0 0x1000>;
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clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
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clock-names = "spiclk", "apb_pclk";
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac 25>, <&dmac 24>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi1: spi@ff9d0000 {
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compatible = "rockchip,rk3528-spi",
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"rockchip,rk3066-spi";
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reg = <0x0 0xff9d0000 0x0 0x1000>;
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clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
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clock-names = "spiclk", "apb_pclk";
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interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac 31>, <&dmac 30>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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uart0: serial@ff9f0000 {
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compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";
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reg = <0x0 0xff9f0000 0x0 0x100>;
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