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PCI: tegra: Convert struct tegra_msi mask_lock into raw spinlock
The tegra_msi_irq_unmask() function may be called from a PCI driver
request_threaded_irq() function. This triggers kernel/irq/manage.c
__setup_irq() which locks raw spinlock &desc->lock descriptor lock
and with that descriptor lock held, calls tegra_msi_irq_unmask().
Since the &desc->lock descriptor lock is a raw spinlock, and the tegra_msi
.mask_lock is not a raw spinlock, this setup triggers 'BUG: Invalid wait
context' with CONFIG_PROVE_RAW_LOCK_NESTING=y.
Use scoped_guard() to simplify the locking.
Fixes: 2c99e55f79 ("PCI: tegra: Convert to MSI domains")
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Closes: https://patchwork.kernel.org/project/linux-pci/patch/20250909162707.13927-2-marek.vasut+renesas@mailbox.org/#26574451
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20250922150811.88450-1-marek.vasut+renesas@mailbox.org
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@ -14,6 +14,7 @@
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*/
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#include <linux/clk.h>
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#include <linux/cleanup.h>
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#include <linux/debugfs.h>
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#include <linux/delay.h>
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#include <linux/export.h>
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@ -270,7 +271,7 @@ struct tegra_msi {
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DECLARE_BITMAP(used, INT_PCI_MSI_NR);
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struct irq_domain *domain;
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struct mutex map_lock;
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spinlock_t mask_lock;
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raw_spinlock_t mask_lock;
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void *virt;
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dma_addr_t phys;
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int irq;
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@ -1581,14 +1582,13 @@ static void tegra_msi_irq_mask(struct irq_data *d)
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struct tegra_msi *msi = irq_data_get_irq_chip_data(d);
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struct tegra_pcie *pcie = msi_to_pcie(msi);
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unsigned int index = d->hwirq / 32;
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unsigned long flags;
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u32 value;
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spin_lock_irqsave(&msi->mask_lock, flags);
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value = afi_readl(pcie, AFI_MSI_EN_VEC(index));
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value &= ~BIT(d->hwirq % 32);
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afi_writel(pcie, value, AFI_MSI_EN_VEC(index));
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spin_unlock_irqrestore(&msi->mask_lock, flags);
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scoped_guard(raw_spinlock_irqsave, &msi->mask_lock) {
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value = afi_readl(pcie, AFI_MSI_EN_VEC(index));
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value &= ~BIT(d->hwirq % 32);
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afi_writel(pcie, value, AFI_MSI_EN_VEC(index));
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}
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}
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static void tegra_msi_irq_unmask(struct irq_data *d)
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@ -1596,14 +1596,13 @@ static void tegra_msi_irq_unmask(struct irq_data *d)
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struct tegra_msi *msi = irq_data_get_irq_chip_data(d);
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struct tegra_pcie *pcie = msi_to_pcie(msi);
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unsigned int index = d->hwirq / 32;
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unsigned long flags;
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u32 value;
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spin_lock_irqsave(&msi->mask_lock, flags);
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value = afi_readl(pcie, AFI_MSI_EN_VEC(index));
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value |= BIT(d->hwirq % 32);
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afi_writel(pcie, value, AFI_MSI_EN_VEC(index));
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spin_unlock_irqrestore(&msi->mask_lock, flags);
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scoped_guard(raw_spinlock_irqsave, &msi->mask_lock) {
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value = afi_readl(pcie, AFI_MSI_EN_VEC(index));
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value |= BIT(d->hwirq % 32);
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afi_writel(pcie, value, AFI_MSI_EN_VEC(index));
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}
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}
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static void tegra_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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@ -1711,7 +1710,7 @@ static int tegra_pcie_msi_setup(struct tegra_pcie *pcie)
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int err;
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mutex_init(&msi->map_lock);
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spin_lock_init(&msi->mask_lock);
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raw_spin_lock_init(&msi->mask_lock);
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if (IS_ENABLED(CONFIG_PCI_MSI)) {
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err = tegra_allocate_domains(msi);
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