drm/amdgpu: Create hqd info structure

Create hung_queue_hqd_info structure and fill in hung queses information
passed by MES, including queue type, pipe id, and queue id.

Suggested-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Amber Lin 2026-03-13 05:53:46 -04:00 committed by Alex Deucher
parent 6404825255
commit 26bde9453b
2 changed files with 17 additions and 9 deletions

View File

@ -448,7 +448,7 @@ int amdgpu_mes_detect_and_reset_hung_queues(struct amdgpu_device *adev,
{
struct mes_detect_and_reset_queue_input input;
u32 *db_array = adev->mes.hung_queue_db_array_cpu_addr[xcc_id];
int r, i;
int hqd_info_offset = adev->mes.hung_queue_hqd_info_offset, r, i;
if (!hung_db_num || !hung_db_array)
return -EINVAL;
@ -482,18 +482,13 @@ int amdgpu_mes_detect_and_reset_hung_queues(struct amdgpu_device *adev,
}
}
if (r && !hung_db_num) {
if (r && !(*hung_db_num)) {
dev_err(adev->dev, "Failed to detect and reset hung queues\n");
return r;
}
/*
* TODO: return HQD info for MES scheduled user compute queue reset cases
* stored in hung_db_array hqd info offset to full array size
*/
if (r)
dev_err(adev->dev, "failed to reset\n");
for (i = hqd_info_offset; i < hqd_info_offset + *hung_db_num; i++)
hung_db_array[i] = db_array[i];
return r;
}

View File

@ -170,6 +170,19 @@ struct amdgpu_mes {
uint64_t shared_cmd_buf_gpu_addr[AMDGPU_MAX_MES_INST_PIPES];
};
struct amdgpu_mes_hung_queue_hqd_info {
union {
struct {
u32 queue_type: 3; // queue type
u32 pipe_index: 4; // pipe index
u32 queue_index: 8; // queue index
u32 reserved: 17;
};
u32 bit0_31;
};
};
struct amdgpu_mes_gang {
int gang_id;
int priority;