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drm/amd: Restore cached power limit during resume

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The power limit will be cached in smu->current_power_limit but
if the ASIC goes into S3 this value won't be restored.

Restore the value during SMU resume.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/r/20250725031222.3015095-2-superm1@kernel.org
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mario Limonciello 2025-07-24 22:12:21 -05:00 committed by Alex Deucher
parent 8e3967a71e
commit 26a609e053
1 changed files with 6 additions and 0 deletions
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6
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
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@ -2226,6 +2226,12 @@ static int smu_resume(struct amdgpu_ip_block *ip_block)
adev->pm.dpm_enabled = true;
if (smu->current_power_limit) {
ret = smu_set_power_limit(smu, smu->current_power_limit);
if (ret && ret != -EOPNOTSUPP)
return ret;
}
dev_info(adev->dev, "SMU is resumed successfully!\n");
return 0;