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dt-bindings: mfd: aspeed,ast2x00-scu: Describe AST2700 SCU0

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AST2700 consists of two interconnected SoC instances, each with its own
System Control Unit (SCU). The SCU0 provides pin control, interrupt
controllers, clocks, resets, and address-space mappings for the
Secondary and Tertiary Service Processors (SSP and TSP).

Describe the SSP/TSP address mappings using the standard
memory-region and memory-region-names properties.

Disallow legacy child nodes that are not present on AST2700, including
p2a-control and smp-memram. The latter is unnecessary as software can
access the scratch registers via the SCU syscon.

Also allow the AST2700 SoC0 pin controller to be described as a child
node of the SCU0, and add an example illustrating the SCU0 layout,
including reserved-memory, interrupt controllers, and pinctrl.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Linus Walleij <linusw@kernel.org>
Link: https://patch.msgid.link/20260428-upstream_pinctrl-v8-2-eb8ef9ab0498@aspeedtech.com
Signed-off-by: Lee Jones <lee@kernel.org>
This commit is contained in:
Billy Tsai 2026-04-28 17:49:46 +08:00 committed by Lee Jones
parent e6f0018fbf
commit 2611c4d623
1 changed files with 114 additions and 0 deletions
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114
Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
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@ -46,6 +46,18 @@ properties:
'#reset-cells':
const: 1
memory-region:
items:
- description: Region mapped through the first SSP address window.
- description: Region mapped through the second SSP address window.
- description: Region mapped through the TSP address window.
memory-region-names:
items:
- const: ssp-0
- const: ssp-1
- const: tsp
patternProperties:
'^p2a-control@[0-9a-f]+$':
description: >
@ -87,6 +99,7 @@ patternProperties:
- aspeed,ast2400-pinctrl
- aspeed,ast2500-pinctrl
- aspeed,ast2600-pinctrl
- aspeed,ast2700-soc0-pinctrl
required:
- compatible
@ -156,6 +169,30 @@ required:
- '#clock-cells'
- '#reset-cells'
allOf:
- if:
properties:
compatible:
contains:
enum:
- aspeed,ast2700-scu0
- aspeed,ast2700-scu1
then:
patternProperties:
'^p2a-control@[0-9a-f]+$': false
'^smp-memram@[0-9a-f]+$': false
- if:
not:
properties:
compatible:
contains:
const: aspeed,ast2700-scu0
then:
properties:
memory-region: false
memory-region-names: false
additionalProperties: false
examples:
@ -180,4 +217,81 @@ examples:
reg = <0x7c 0x4>, <0x150 0x8>;
};
};
- |
/ {
#address-cells = <2>;
#size-cells = <2>;
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
ssp_region_0: memory@400000000 {
reg = <0x4 0x00000000 0x0 0x01000000>;
no-map;
};
ssp_region_1: memory@401000000 {
reg = <0x4 0x01000000 0x0 0x01000000>;
no-map;
};
tsp_region: memory@402000000 {
reg = <0x4 0x02000000 0x0 0x01000000>;
no-map;
};
};
bus {
#address-cells = <2>;
#size-cells = <2>;
syscon@12c02000 {
compatible = "aspeed,ast2700-scu0", "syscon", "simple-mfd";
reg = <0 0x12c02000 0 0x1000>;
ranges = <0x0 0x0 0x12c02000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
#clock-cells = <1>;
#reset-cells = <1>;
memory-region = <&ssp_region_0>, <&ssp_region_1>,
<&tsp_region>;
memory-region-names = "ssp-0", "ssp-1", "tsp";
silicon-id@0 {
compatible = "aspeed,ast2700-silicon-id", "aspeed,silicon-id";
reg = <0x0 0x4>;
};
interrupt-controller@1b0 {
compatible = "aspeed,ast2700-scu-ic0";
reg = <0x1b0 0x4>;
#interrupt-cells = <1>;
interrupts-extended = <&intc0 97>;
interrupt-controller;
};
interrupt-controller@1e0 {
compatible = "aspeed,ast2700-scu-ic1";
reg = <0x1e0 0x4>;
#interrupt-cells = <1>;
interrupts-extended = <&intc0 98>;
interrupt-controller;
};
pinctrl@400 {
compatible = "aspeed,ast2700-soc0-pinctrl";
reg = <0x400 0x318>;
emmc-state {
function = "EMMC";
groups = "EMMCG1";
};
};
};
};
};
...