From 26004caf89391254f2b7fef912c0d5e52a45a59d Mon Sep 17 00:00:00 2001 From: Ce Sun Date: Wed, 25 Mar 2026 10:47:38 +0800 Subject: [PATCH] drm/amdgpu: retire legacy mca umc status check interface Remove the legacy interface to check mca umc status Reviewed-by: Hawking Zhang Signed-off-by: Ce Sun Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h | 1 - drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 3 --- drivers/gpu/drm/amd/amdgpu/umc_v12_0.c | 20 -------------------- 3 files changed, 24 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h index 6d12f8a516d5..8ad47c5ab022 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h @@ -26,7 +26,6 @@ enum amdgpu_mca_error_type { AMDGPU_MCA_ERROR_TYPE_UE = 0, AMDGPU_MCA_ERROR_TYPE_CE, - AMDGPU_MCA_ERROR_TYPE_DE, }; struct amdgpu_mca_ras_block { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h index cf06d5f856f9..46c42997d314 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h @@ -21,7 +21,6 @@ #ifndef __AMDGPU_UMC_H__ #define __AMDGPU_UMC_H__ #include "amdgpu_ras.h" -#include "amdgpu_mca.h" /* * (addr / 256) * 4096, the higher 26 bits in ErrorAddr * is the index of 4KB block @@ -101,8 +100,6 @@ struct amdgpu_umc_ras { void *ras_error_status); void (*ecc_info_query_ras_error_address)(struct amdgpu_device *adev, void *ras_error_status); - bool (*check_ecc_err_status)(struct amdgpu_device *adev, - enum amdgpu_mca_error_type type, void *ras_error_status); void (*get_retire_flip_bits)(struct amdgpu_device *adev); }; diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c index 67bdf7303e6b..d62712324940 100644 --- a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c @@ -178,30 +178,10 @@ static void umc_v12_0_get_retire_flip_bits(struct amdgpu_device *adev) adev->umc.retire_unit = 0x1 << flip_bits->bit_num; } -static bool umc_v12_0_check_ecc_err_status(struct amdgpu_device *adev, - enum amdgpu_mca_error_type type, void *ras_error_status) -{ - uint64_t mc_umc_status = *(uint64_t *)ras_error_status; - - switch (type) { - case AMDGPU_MCA_ERROR_TYPE_UE: - return umc_v12_0_is_uncorrectable_error(adev, mc_umc_status); - case AMDGPU_MCA_ERROR_TYPE_CE: - return umc_v12_0_is_correctable_error(adev, mc_umc_status); - case AMDGPU_MCA_ERROR_TYPE_DE: - return umc_v12_0_is_deferred_error(adev, mc_umc_status); - default: - return false; - } - - return false; -} - struct amdgpu_umc_ras umc_v12_0_ras = { .ras_block = { .hw_ops = NULL, }, - .check_ecc_err_status = umc_v12_0_check_ecc_err_status, .get_retire_flip_bits = umc_v12_0_get_retire_flip_bits, };