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drm/amd/display: Add tags for indicating mst progress status
[Why & How] In order to leverage igt tool to maintain mst feature, expose new debugfs entry "mst_progress_status". In our dm flow, record down the result of each phase of mst and user can examine the mst result by checking whether each phase get completed successfully. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -571,6 +571,14 @@ struct dsc_preferred_settings {
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bool dsc_force_disable_passthrough;
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};
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enum mst_progress_status {
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MST_STATUS_DEFAULT = 0,
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MST_PROBE = BIT(0),
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MST_REMOTE_EDID = BIT(1),
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MST_ALLOCATE_NEW_PAYLOAD = BIT(2),
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MST_CLEAR_ALLOCATED_PAYLOAD = BIT(3),
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};
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struct amdgpu_dm_connector {
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struct drm_connector base;
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@ -623,8 +631,20 @@ struct amdgpu_dm_connector {
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struct drm_display_mode freesync_vid_base;
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int psr_skip_count;
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/* Record progress status of mst*/
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uint8_t mst_status;
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};
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static inline void amdgpu_dm_set_mst_status(uint8_t *status,
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uint8_t flags, bool set)
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{
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if (set)
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*status |= flags;
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else
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*status &= ~flags;
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}
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#define to_amdgpu_dm_connector(x) container_of(x, struct amdgpu_dm_connector, base)
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extern const struct amdgpu_ip_block_version dm_ip_block;
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@ -50,6 +50,13 @@ struct dmub_debugfs_trace_entry {
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uint32_t param1;
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};
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static const char *const mst_progress_status[] = {
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"probe",
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"remote_edid",
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"allocate_new_payload",
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"clear_allocated_payload",
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};
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/* parse_write_buffer_into_params - Helper function to parse debugfs write buffer into an array
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*
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* Function takes in attributes passed to debugfs write entry
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@ -2590,6 +2597,41 @@ static int dp_is_mst_connector_show(struct seq_file *m, void *unused)
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return 0;
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}
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/*
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* function description: Read out the mst progress status
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*
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* This function helps to determine the mst progress status of
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* a mst connector.
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*
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* Access it with the following command:
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*
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* cat /sys/kernel/debug/dri/0/DP-X/mst_progress_status
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*
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*/
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static int dp_mst_progress_status_show(struct seq_file *m, void *unused)
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{
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struct drm_connector *connector = m->private;
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struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
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struct amdgpu_device *adev = drm_to_adev(connector->dev);
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int i;
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mutex_lock(&aconnector->hpd_lock);
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mutex_lock(&adev->dm.dc_lock);
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if (aconnector->mst_status == MST_STATUS_DEFAULT) {
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seq_puts(m, "disabled\n");
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} else {
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for (i = 0; i < sizeof(mst_progress_status)/sizeof(char *); i++)
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seq_printf(m, "%s:%s\n",
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mst_progress_status[i],
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aconnector->mst_status & BIT(i) ? "done" : "not_done");
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}
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mutex_unlock(&adev->dm.dc_lock);
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mutex_unlock(&aconnector->hpd_lock);
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(dp_dsc_fec_support);
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DEFINE_SHOW_ATTRIBUTE(dmub_fw_state);
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@ -2601,6 +2643,7 @@ DEFINE_SHOW_ATTRIBUTE(hdcp_sink_capability);
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DEFINE_SHOW_ATTRIBUTE(internal_display);
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DEFINE_SHOW_ATTRIBUTE(psr_capability);
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DEFINE_SHOW_ATTRIBUTE(dp_is_mst_connector);
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DEFINE_SHOW_ATTRIBUTE(dp_mst_progress_status);
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static const struct file_operations dp_dsc_clock_en_debugfs_fops = {
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.owner = THIS_MODULE,
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@ -2744,7 +2787,8 @@ static const struct {
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{"dp_dsc_fec_support", &dp_dsc_fec_support_fops},
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{"max_bpc", &dp_max_bpc_debugfs_fops},
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{"dsc_disable_passthrough", &dp_dsc_disable_passthrough_debugfs_fops},
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{"is_mst_connector", &dp_is_mst_connector_fops}
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{"is_mst_connector", &dp_is_mst_connector_fops},
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{"mst_progress_status", &dp_mst_progress_status_fops}
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};
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#ifdef CONFIG_DRM_AMD_DC_HDCP
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@ -312,6 +312,8 @@ bool dm_helpers_dp_mst_send_payload_allocation(
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struct amdgpu_dm_connector *aconnector;
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struct drm_dp_mst_topology_mgr *mst_mgr;
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struct drm_dp_mst_port *mst_port;
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enum mst_progress_status set_flag = MST_ALLOCATE_NEW_PAYLOAD;
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enum mst_progress_status clr_flag = MST_CLEAR_ALLOCATED_PAYLOAD;
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aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
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@ -325,8 +327,20 @@ bool dm_helpers_dp_mst_send_payload_allocation(
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if (!mst_mgr->mst_state)
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return false;
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/* It's OK for this to fail */
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drm_dp_update_payload_part2(mst_mgr);
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if (!enable) {
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set_flag = MST_CLEAR_ALLOCATED_PAYLOAD;
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clr_flag = MST_ALLOCATE_NEW_PAYLOAD;
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}
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if (drm_dp_update_payload_part2(mst_mgr)) {
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amdgpu_dm_set_mst_status(&aconnector->mst_status,
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set_flag, false);
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} else {
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amdgpu_dm_set_mst_status(&aconnector->mst_status,
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set_flag, true);
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amdgpu_dm_set_mst_status(&aconnector->mst_status,
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clr_flag, false);
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}
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if (!enable)
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drm_dp_mst_deallocate_vcpi(mst_mgr, mst_port);
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@ -179,6 +179,8 @@ amdgpu_dm_mst_connector_early_unregister(struct drm_connector *connector)
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aconnector->dc_sink = NULL;
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aconnector->edid = NULL;
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}
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aconnector->mst_status = MST_STATUS_DEFAULT;
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drm_modeset_unlock(&root->mst_mgr.base.lock);
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}
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@ -279,6 +281,9 @@ static int dm_dp_mst_get_modes(struct drm_connector *connector)
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edid = drm_dp_mst_get_edid(connector, &aconnector->mst_port->mst_mgr, aconnector->port);
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if (!edid) {
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amdgpu_dm_set_mst_status(&aconnector->mst_status,
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MST_REMOTE_EDID, false);
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drm_connector_update_edid_property(
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&aconnector->base,
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NULL);
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@ -309,6 +314,8 @@ static int dm_dp_mst_get_modes(struct drm_connector *connector)
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}
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aconnector->edid = edid;
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amdgpu_dm_set_mst_status(&aconnector->mst_status,
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MST_REMOTE_EDID, true);
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}
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if (aconnector->dc_sink && aconnector->dc_sink->sink_signal == SIGNAL_TYPE_VIRTUAL) {
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@ -430,6 +437,10 @@ dm_dp_mst_detect(struct drm_connector *connector,
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dc_sink_release(aconnector->dc_sink);
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aconnector->dc_sink = NULL;
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aconnector->edid = NULL;
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amdgpu_dm_set_mst_status(&aconnector->mst_status,
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MST_REMOTE_EDID | MST_ALLOCATE_NEW_PAYLOAD | MST_CLEAR_ALLOCATED_PAYLOAD,
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false);
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}
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return connection_status;
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@ -526,6 +537,8 @@ dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
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connector = &aconnector->base;
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aconnector->port = port;
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aconnector->mst_port = master;
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amdgpu_dm_set_mst_status(&aconnector->mst_status,
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MST_PROBE, true);
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if (drm_connector_init(
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dev,
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